^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mach-davinci/devices.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * DaVinci platform device setup/initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_data/i2c-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_data/mmc-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_data/edma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <mach/cputype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "davinci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DAVINCI_I2C_BASE 0x01C21000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DAVINCI_ATA_BASE 0x01C66000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DAVINCI_MMCSD0_BASE 0x01E10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DM355_MMCSD0_BASE 0x01E11000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DM355_MMCSD1_BASE 0x01E00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DM365_MMCSD0_BASE 0x01D11000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DM365_MMCSD1_BASE 0x01D00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void __iomem *davinci_sysmod_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void davinci_map_sysmod(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) davinci_sysmod_base = ioremap(DAVINCI_SYSTEM_MODULE_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 0x800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Throw a bug since a lot of board initialization code depends
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * on system module availability. ioremap() failing this early
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * need careful looking into anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) BUG_ON(!davinci_sysmod_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static struct resource i2c_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .start = DAVINCI_I2C_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .end = DAVINCI_I2C_BASE + 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .start = DAVINCI_INTC_IRQ(IRQ_I2C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static struct platform_device davinci_i2c_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .name = "i2c_davinci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .num_resources = ARRAY_SIZE(i2c_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .resource = i2c_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (cpu_is_davinci_dm644x())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) davinci_cfg_reg(DM644X_I2C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) davinci_i2c_device.dev.platform_data = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) (void) platform_device_register(&davinci_i2c_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static struct resource ide_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .start = DAVINCI_ATA_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .end = DAVINCI_ATA_BASE + 0x7ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .start = DAVINCI_INTC_IRQ(IRQ_IDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .end = DAVINCI_INTC_IRQ(IRQ_IDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static u64 ide_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static struct platform_device ide_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .name = "palm_bk3710",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .resource = ide_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .num_resources = ARRAY_SIZE(ide_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .dma_mask = &ide_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) void __init davinci_init_ide(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (cpu_is_davinci_dm644x()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) davinci_cfg_reg(DM644X_HPIEN_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) davinci_cfg_reg(DM644X_ATAEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) davinci_cfg_reg(DM644X_HDIREN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) } else if (cpu_is_davinci_dm646x()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* IRQ_DM646X_IDE is the same as IRQ_IDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) davinci_cfg_reg(DM646X_ATAEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) platform_device_register(&ide_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #if IS_ENABLED(CONFIG_MMC_DAVINCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct resource mmcsd0_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* different on dm355 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .start = DAVINCI_MMCSD0_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* IRQs: MMC/SD, then SDIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* different on dm355 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static struct platform_device davinci_mmcsd0_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .name = "dm6441-mmc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .dma_mask = &mmcsd0_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .num_resources = ARRAY_SIZE(mmcsd0_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .resource = mmcsd0_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static struct resource mmcsd1_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .start = DM355_MMCSD1_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .end = DM355_MMCSD1_BASE + SZ_4K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* IRQs: MMC/SD, then SDIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct platform_device davinci_mmcsd1_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .name = "dm6441-mmc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .dma_mask = &mmcsd1_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .num_resources = ARRAY_SIZE(mmcsd1_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .resource = mmcsd1_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct platform_device *pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (WARN_ON(cpu_is_davinci_dm646x()))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * not handled right here ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) switch (module) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (cpu_is_davinci_dm355()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* REVISIT we may not need all these pins if e.g. this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * is a hard-wired SDIO device...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) davinci_cfg_reg(DM355_SD1_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) davinci_cfg_reg(DM355_SD1_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) davinci_cfg_reg(DM355_SD1_DATA0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) davinci_cfg_reg(DM355_SD1_DATA1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) davinci_cfg_reg(DM355_SD1_DATA2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) davinci_cfg_reg(DM355_SD1_DATA3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) } else if (cpu_is_davinci_dm365()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* Configure pull down control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) unsigned v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) __raw_writel(v & ~0xfc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) SZ_4K - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) IRQ_DM365_SDIOINT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) davinci_mmcsd1_device.name = "da830-mmc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) pdev = &davinci_mmcsd1_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (cpu_is_davinci_dm355()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) IRQ_DM355_SDIOINT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) davinci_cfg_reg(DM355_MMCSD0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* enable RX EDMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) davinci_cfg_reg(DM355_EVT26_MMC0_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) } else if (cpu_is_davinci_dm365()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) SZ_4K - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) IRQ_DM365_SDIOINT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) davinci_mmcsd0_device.name = "da830-mmc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) } else if (cpu_is_davinci_dm644x()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* REVISIT: should this be in board-init code? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* Power-on 3.3V IO cells */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) __raw_writel(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /*Set up the pull regiter for MMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) davinci_cfg_reg(DM644X_MSTK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) pdev = &davinci_mmcsd0_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (WARN_ON(!pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) pdev->dev.platform_data = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) platform_device_register(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static struct resource wdt_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .start = DAVINCI_WDOG_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static struct platform_device davinci_wdt_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .name = "davinci-wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .num_resources = ARRAY_SIZE(wdt_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .resource = wdt_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int davinci_init_wdt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return platform_device_register(&davinci_wdt_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static struct platform_device davinci_gpio_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .name = "davinci_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int davinci_gpio_register(struct resource *res, int size, void *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) davinci_gpio_device.resource = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) davinci_gpio_device.num_resources = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) davinci_gpio_device.dev.platform_data = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return platform_device_register(&davinci_gpio_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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