^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #define DDR2_SDRCR_OFFSET 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define DDR2_SRPD_BIT (1 << 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define DDR2_MCLKSTOPEN_BIT (1 << 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define DDR2_LPMODEN_BIT (1 << 31)