^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Hawkboard.org based on TI's OMAP-L138 Platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Initial code: Syed Mohammed Khasim
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file is licensed under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * version 2. This program is licensed "as is" without any warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mtd/rawnand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_data/gpio-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_data/mtd-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_data/mtd-davinci-aemif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_data/ti-aemif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <mach/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <mach/da8xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static short omapl138_hawk_mii_pins[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) DA850_MDIO_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static __init void omapl138_hawk_config_emac(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct davinci_soc_info *soc_info = &davinci_soc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) val = __raw_readl(cfgchip3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) val &= ~BIT(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) pr_warn("%s: CPGMAC/MII mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* configure the CFGCHIP3 register for MII */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) __raw_writel(val, cfgchip3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) pr_info("EMAC: MII PHY configured\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ret = da8xx_register_emac();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * The following EDMA channels/slots are not being used by drivers (for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * hence they are being reserved for codecs on the DSP side.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static const s16 da850_dma0_rsv_chans[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { 8, 6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {24, 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {30, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const s16 da850_dma0_rsv_slots[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) { 8, 6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {24, 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {30, 50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static const s16 da850_dma1_rsv_chans[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) { 0, 28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {30, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const s16 da850_dma1_rsv_slots[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { 0, 28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {30, 90},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static struct edma_rsv_info da850_edma_cc0_rsv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .rsv_chans = da850_dma0_rsv_chans,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .rsv_slots = da850_dma0_rsv_slots,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static struct edma_rsv_info da850_edma_cc1_rsv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .rsv_chans = da850_dma1_rsv_chans,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .rsv_slots = da850_dma1_rsv_slots,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static struct edma_rsv_info *da850_edma_rsv[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) &da850_edma_cc0_rsv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) &da850_edma_cc1_rsv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const short hawk_mmcsd0_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) DA850_GPIO3_12, DA850_GPIO3_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static struct gpiod_lookup_table mmc_gpios_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .dev_id = "da830-mmc.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_CD_PIN, "cd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_WP_PIN, "wp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static struct davinci_mmc_config da850_mmc_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .wires = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .max_freq = 50000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static __init void omapl138_hawk_mmc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ret = davinci_cfg_reg_list(hawk_mmcsd0_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pr_warn("%s: MMC/SD0 mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) gpiod_add_lookup_table(&mmc_gpios_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ret = da8xx_register_mmcsd0(&da850_mmc_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) pr_warn("%s: MMC/SD0 registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) goto mmc_setup_mmcsd_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) mmc_setup_mmcsd_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) gpiod_remove_lookup_table(&mmc_gpios_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static struct mtd_partition omapl138_hawk_nandflash_partition[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .name = "u-boot env",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .size = SZ_128K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .name = "u-boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .size = SZ_512K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .name = "free space",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static struct davinci_aemif_timing omapl138_hawk_nandflash_timing = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .wsetup = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .wstrobe = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .whold = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .rsetup = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .rstrobe = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .rhold = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .ta = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static struct davinci_nand_pdata omapl138_hawk_nandflash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .core_chipsel = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .parts = omapl138_hawk_nandflash_partition,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .ecc_bits = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .bbt_options = NAND_BBT_USE_FLASH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .options = NAND_BUSWIDTH_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .timing = &omapl138_hawk_nandflash_timing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .mask_chipsel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .mask_ale = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .mask_cle = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static struct resource omapl138_hawk_nandflash_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .start = DA8XX_AEMIF_CS3_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .end = DA8XX_AEMIF_CS3_BASE + SZ_32M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .start = DA8XX_AEMIF_CTL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static struct resource omapl138_hawk_aemif_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .start = DA8XX_AEMIF_CTL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .cs = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static struct platform_device omapl138_hawk_aemif_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .name = "davinci_nand",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .platform_data = &omapl138_hawk_nandflash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .resource = omapl138_hawk_nandflash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static struct aemif_platform_data omapl138_hawk_aemif_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .cs_offset = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .abus_data = omapl138_hawk_aemif_abus_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .num_abus_data = ARRAY_SIZE(omapl138_hawk_aemif_abus_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .sub_devices = omapl138_hawk_aemif_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .num_sub_devices = ARRAY_SIZE(omapl138_hawk_aemif_devices),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static struct platform_device omapl138_hawk_aemif_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .name = "ti-aemif",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .platform_data = &omapl138_hawk_aemif_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .resource = omapl138_hawk_aemif_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .num_resources = ARRAY_SIZE(omapl138_hawk_aemif_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static const short omapl138_hawk_nand_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) DA850_EMA_WAIT_1, DA850_NEMA_OE, DA850_NEMA_WE, DA850_NEMA_CS_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) DA850_EMA_A_1, DA850_EMA_A_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int omapl138_hawk_register_aemif(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ret = davinci_cfg_reg_list(omapl138_hawk_nand_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) pr_warn("%s: NAND mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return platform_device_register(&omapl138_hawk_aemif_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static const short da850_hawk_usb11_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) DA850_GPIO2_4, DA850_GPIO6_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static struct regulator_consumer_supply hawk_usb_supplies[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) REGULATOR_SUPPLY("vbus", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static struct regulator_init_data hawk_usb_vbus_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .consumer_supplies = hawk_usb_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .num_consumer_supplies = ARRAY_SIZE(hawk_usb_supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static struct fixed_voltage_config hawk_usb_vbus = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .supply_name = "vbus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .microvolts = 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .init_data = &hawk_usb_vbus_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static struct platform_device hawk_usb_vbus_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .name = "reg-fixed-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .platform_data = &hawk_usb_vbus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static struct gpiod_lookup_table hawk_usb_oc_gpio_lookup = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .dev_id = "ohci-da8xx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) GPIO_LOOKUP("davinci_gpio", DA850_USB1_OC_PIN, "oc", 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static struct gpiod_lookup_table hawk_usb_vbus_gpio_lookup = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .dev_id = "reg-fixed-voltage.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) GPIO_LOOKUP("davinci_gpio", DA850_USB1_VBUS_PIN, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static struct gpiod_lookup_table *hawk_usb_gpio_lookups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) &hawk_usb_oc_gpio_lookup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) &hawk_usb_vbus_gpio_lookup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* TPS2087 switch @ 5V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .potpgt = (3 + 1) / 2, /* 3 ms max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static __init void omapl138_hawk_usb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) ret = da8xx_register_usb_phy_clocks();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) pr_warn("%s: USB PHY CLK registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) gpiod_add_lookup_tables(hawk_usb_gpio_lookups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ARRAY_SIZE(hawk_usb_gpio_lookups));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ret = da8xx_register_usb_phy();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) pr_warn("%s: USB PHY registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ret = platform_device_register(&hawk_usb_vbus_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) pr_warn("%s: Unable to register the vbus supply\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static __init void omapl138_hawk_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) da850_register_clocks();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) ret = da850_register_gpio();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) davinci_serial_init(da8xx_serial_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) omapl138_hawk_config_emac();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ret = da850_register_edma(da850_edma_rsv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) omapl138_hawk_mmc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) omapl138_hawk_usb_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) ret = omapl138_hawk_register_aemif();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) pr_warn("%s: aemif registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) ret = da8xx_register_watchdog();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) pr_warn("%s: watchdog registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) ret = da8xx_register_rproc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) pr_warn("%s: dsp/rproc registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #ifdef CONFIG_SERIAL_8250_CONSOLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static int __init omapl138_hawk_console_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (!machine_is_omapl138_hawkboard())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return add_preferred_console("ttyS", 2, "115200");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) console_initcall(omapl138_hawk_console_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static void __init omapl138_hawk_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) da850_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .map_io = omapl138_hawk_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .init_irq = da850_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .init_time = da850_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .init_machine = omapl138_hawk_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .init_late = davinci_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .dma_zone_size = SZ_128M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .reserve = da8xx_rproc_reserve_cma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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