^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * TI DA850/OMAP-L138 EVM board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Derived from: arch/arm/mach-davinci/board-da830-evm.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Original Copyrights follow:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * the terms of the GNU General Public License version 2. This program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * is licensed "as is" without any warranty of any kind, whether express
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio_keys.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_data/pca953x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/input/tps6507x-ts.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/mfd/tps6507x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mtd/rawnand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/nvmem-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/platform_data/gpio-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/platform_data/mtd-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/platform_data/mtd-davinci-aemif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/platform_data/ti-aemif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/platform_data/spi-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/platform_data/uio_pruss.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/regulator/tps6507x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/spi/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <mach/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <mach/da8xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include "sram.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <asm/system_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <media/i2c/tvp514x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <media/i2c/adv7343.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define DA850_EVM_PHY_ID "davinci_mdio-0:00"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct mtd_partition da850evm_spiflash_part[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .name = "UBL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .size = SZ_64K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .name = "U-Boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .size = SZ_512K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .name = "U-Boot-Env",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .size = SZ_64K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) [3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .name = "Kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .size = SZ_2M + SZ_512K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) [4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .name = "Filesystem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .size = SZ_4M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) [5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .name = "MAC-Address",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .offset = SZ_8M - SZ_64K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .size = SZ_64K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct nvmem_cell_info da850evm_nvmem_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .name = "macaddr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .offset = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .bytes = ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static struct nvmem_cell_table da850evm_nvmem_cell_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * The nvmem name differs from the partition name because of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * internal works of the nvmem framework.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .nvmem_name = "MAC-Address0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .cells = da850evm_nvmem_cells,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .ncells = ARRAY_SIZE(da850evm_nvmem_cells),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static struct nvmem_cell_lookup da850evm_nvmem_cell_lookup = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .nvmem_name = "MAC-Address0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .cell_name = "macaddr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .dev_id = "davinci_emac.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .con_id = "mac-address",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static struct flash_platform_data da850evm_spiflash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .name = "m25p80",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .parts = da850evm_spiflash_part,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .type = "m25p64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static struct davinci_spi_config da850evm_spiflash_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .io_type = SPI_IO_TYPE_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .c2tdelay = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .t2cdelay = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static struct spi_board_info da850evm_spi_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .modalias = "m25p80",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .platform_data = &da850evm_spiflash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .controller_data = &da850evm_spiflash_cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .mode = SPI_MODE_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .max_speed_hz = 30000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .bus_num = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .chip_select = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static struct mtd_partition da850_evm_norflash_partition[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .name = "bootloaders + env",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .size = SZ_512K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .name = "kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .size = SZ_2M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .name = "filesystem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static struct physmap_flash_data da850_evm_norflash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .parts = da850_evm_norflash_partition,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static struct resource da850_evm_norflash_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .start = DA8XX_AEMIF_CS2_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * (128K blocks). It may be used instead of the (default) SPI flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * to boot, using TI's tools to install the secondary boot loader
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * (UBL) and U-Boot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static struct mtd_partition da850_evm_nandflash_partition[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .name = "u-boot env",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .size = SZ_128K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .name = "UBL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .size = SZ_128K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .name = "u-boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .size = 4 * SZ_128K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .name = "kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .offset = 0x200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .size = SZ_2M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .name = "filesystem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static struct davinci_aemif_timing da850_evm_nandflash_timing = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .wsetup = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .wstrobe = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .whold = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .rsetup = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .rstrobe = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .rhold = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .ta = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static struct davinci_nand_pdata da850_evm_nandflash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .core_chipsel = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .parts = da850_evm_nandflash_partition,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .ecc_bits = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .bbt_options = NAND_BBT_USE_FLASH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .timing = &da850_evm_nandflash_timing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static struct resource da850_evm_nandflash_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .start = DA8XX_AEMIF_CS3_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .start = DA8XX_AEMIF_CTL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static struct resource da850_evm_aemif_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .start = DA8XX_AEMIF_CTL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static struct aemif_abus_data da850_evm_aemif_abus_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .cs = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static struct platform_device da850_evm_aemif_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .name = "davinci_nand",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .platform_data = &da850_evm_nandflash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .resource = da850_evm_nandflash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .platform_data = &da850_evm_norflash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .resource = da850_evm_norflash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static struct aemif_platform_data da850_evm_aemif_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .cs_offset = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .abus_data = da850_evm_aemif_abus_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .sub_devices = da850_evm_aemif_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .num_sub_devices = ARRAY_SIZE(da850_evm_aemif_devices),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static struct platform_device da850_evm_aemif_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .name = "ti-aemif",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .platform_data = &da850_evm_aemif_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .resource = da850_evm_aemif_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .num_resources = ARRAY_SIZE(da850_evm_aemif_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static const short da850_evm_nand_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) DA850_NEMA_WE, DA850_NEMA_OE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static const short da850_evm_nor_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) DA850_EMA_A_22, DA850_EMA_A_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static inline void da850_evm_setup_nor_nand(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (!HAS_MMC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) ret = davinci_cfg_reg_list(da850_evm_nand_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) pr_warn("%s: NAND mux setup failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) ret = davinci_cfg_reg_list(da850_evm_nor_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) pr_warn("%s: NOR mux setup failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ret = platform_device_register(&da850_evm_aemif_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) pr_warn("%s: registering aemif failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #ifdef CONFIG_DA850_UI_RMII
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static inline void da850_evm_setup_emac_rmii(int rmii_sel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct davinci_soc_info *soc_info = &davinci_soc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) soc_info->emac_pdata->rmii_en = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) gpio_set_value_cansleep(rmii_sel, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define DA850_KEYS_DEBOUNCE_MS 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * At 200ms polling interval it is possible to miss an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * event by tapping very lightly on the push button but most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * pushes do result in an event; longer intervals require the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * user to hold the button whereas shorter intervals require
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * more CPU time for polling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define DA850_GPIO_KEYS_POLL_MS 200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) enum da850_evm_ui_exp_pins {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) DA850_EVM_UI_EXP_SEL_C = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) DA850_EVM_UI_EXP_SEL_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) DA850_EVM_UI_EXP_SEL_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) DA850_EVM_UI_EXP_PB8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) DA850_EVM_UI_EXP_PB7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) DA850_EVM_UI_EXP_PB6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) DA850_EVM_UI_EXP_PB5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) DA850_EVM_UI_EXP_PB4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) DA850_EVM_UI_EXP_PB3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) DA850_EVM_UI_EXP_PB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) DA850_EVM_UI_EXP_PB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static const char * const da850_evm_ui_exp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) [DA850_EVM_UI_EXP_PB8] = "pb8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) [DA850_EVM_UI_EXP_PB7] = "pb7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) [DA850_EVM_UI_EXP_PB6] = "pb6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) [DA850_EVM_UI_EXP_PB5] = "pb5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) [DA850_EVM_UI_EXP_PB4] = "pb4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) [DA850_EVM_UI_EXP_PB3] = "pb3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) [DA850_EVM_UI_EXP_PB2] = "pb2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) [DA850_EVM_UI_EXP_PB1] = "pb1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define DA850_N_UI_PB 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static struct gpio_keys_button da850_evm_ui_keys[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) [0 ... DA850_N_UI_PB - 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .type = EV_KEY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .wakeup = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .code = -1, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .gpio = -1, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .desc = NULL, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .buttons = da850_evm_ui_keys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .poll_interval = DA850_GPIO_KEYS_POLL_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static struct platform_device da850_evm_ui_keys_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .name = "gpio-keys-polled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .platform_data = &da850_evm_ui_keys_pdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static void da850_evm_ui_keys_init(unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) struct gpio_keys_button *button;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) for (i = 0; i < DA850_N_UI_PB; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) button = &da850_evm_ui_keys[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) button->code = KEY_F8 - i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) button->desc = da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static inline void da850_evm_setup_video_port(int video_sel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) gpio_set_value_cansleep(video_sel, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static inline void da850_evm_setup_video_port(int video_sel) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) unsigned ngpio, void *c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) int sel_a, sel_b, sel_c, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) pr_warn("Cannot open UI expander pin %d\n", sel_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) goto exp_setup_sela_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) pr_warn("Cannot open UI expander pin %d\n", sel_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) goto exp_setup_selb_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) pr_warn("Cannot open UI expander pin %d\n", sel_c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) goto exp_setup_selc_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* deselect all functionalities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) gpio_direction_output(sel_a, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) gpio_direction_output(sel_b, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) gpio_direction_output(sel_c, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) da850_evm_ui_keys_init(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) ret = platform_device_register(&da850_evm_ui_keys_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) pr_warn("Could not register UI GPIO expander push-buttons");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) goto exp_setup_keys_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) pr_info("DA850/OMAP-L138 EVM UI card detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) da850_evm_setup_nor_nand();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) da850_evm_setup_emac_rmii(sel_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) da850_evm_setup_video_port(sel_c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) exp_setup_keys_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) gpio_free(sel_c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) exp_setup_selc_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) gpio_free(sel_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) exp_setup_selb_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) gpio_free(sel_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) exp_setup_sela_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static int da850_evm_ui_expander_teardown(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) unsigned gpio, unsigned ngpio, void *c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) platform_device_unregister(&da850_evm_ui_keys_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) /* deselect all functionalities */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /* assign the baseboard expander's GPIOs after the UI board's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) #define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) #define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) enum da850_evm_bb_exp_pins {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) DA850_EVM_BB_EXP_SW_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) DA850_EVM_BB_EXP_TP_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) DA850_EVM_BB_EXP_TP_22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) DA850_EVM_BB_EXP_TP_21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) DA850_EVM_BB_EXP_USER_PB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) DA850_EVM_BB_EXP_USER_LED2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) DA850_EVM_BB_EXP_USER_LED1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) DA850_EVM_BB_EXP_USER_SW1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) DA850_EVM_BB_EXP_USER_SW2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) DA850_EVM_BB_EXP_USER_SW3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) DA850_EVM_BB_EXP_USER_SW4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) DA850_EVM_BB_EXP_USER_SW5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) DA850_EVM_BB_EXP_USER_SW6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) DA850_EVM_BB_EXP_USER_SW7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) DA850_EVM_BB_EXP_USER_SW8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) static const char * const da850_evm_bb_exp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) [DA850_EVM_BB_EXP_TP_23] = "tp_23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) [DA850_EVM_BB_EXP_TP_22] = "tp_22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) [DA850_EVM_BB_EXP_TP_21] = "tp_21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) #define DA850_N_BB_USER_SW 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static struct gpio_keys_button da850_evm_bb_keys[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .type = EV_KEY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) .wakeup = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) .code = KEY_PROG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) .desc = NULL, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) .gpio = -1, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) [1 ... DA850_N_BB_USER_SW] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) .type = EV_SW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) .wakeup = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) .code = -1, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) .desc = NULL, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .gpio = -1, /* assigned at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) .buttons = da850_evm_bb_keys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) .poll_interval = DA850_GPIO_KEYS_POLL_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static struct platform_device da850_evm_bb_keys_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) .name = "gpio-keys-polled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .platform_data = &da850_evm_bb_keys_pdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static void da850_evm_bb_keys_init(unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct gpio_keys_button *button;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) button = &da850_evm_bb_keys[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) for (i = 0; i < DA850_N_BB_USER_SW; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) button = &da850_evm_bb_keys[i + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) button->code = SW_LID + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static struct gpio_led da850_evm_bb_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .name = "user_led2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .name = "user_led1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .leds = da850_evm_bb_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static struct gpiod_lookup_table da850_evm_bb_leds_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .dev_id = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) GPIO_LOOKUP_IDX("i2c-bb-expander",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) DA850_EVM_BB_EXP_USER_LED2, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 0, GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) GPIO_LOOKUP_IDX("i2c-bb-expander",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) DA850_EVM_BB_EXP_USER_LED2 + 1, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 1, GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static struct platform_device da850_evm_bb_leds_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .platform_data = &da850_evm_bb_leds_pdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static int da850_evm_bb_expander_setup(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) unsigned gpio, unsigned ngpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) void *c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * Register the switches and pushbutton on the baseboard as a gpio-keys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) da850_evm_bb_keys_init(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) ret = platform_device_register(&da850_evm_bb_keys_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) pr_warn("Could not register baseboard GPIO expander keys");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) goto io_exp_setup_sw_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) gpiod_add_lookup_table(&da850_evm_bb_leds_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) ret = platform_device_register(&da850_evm_bb_leds_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) pr_warn("Could not register baseboard GPIO expander LEDs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) goto io_exp_setup_leds_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) io_exp_setup_leds_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) platform_device_unregister(&da850_evm_bb_keys_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) io_exp_setup_sw_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) static int da850_evm_bb_expander_teardown(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) unsigned gpio, unsigned ngpio, void *c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) platform_device_unregister(&da850_evm_bb_leds_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) platform_device_unregister(&da850_evm_bb_keys_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static struct pca953x_platform_data da850_evm_ui_expander_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .gpio_base = DAVINCI_N_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .setup = da850_evm_ui_expander_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) .teardown = da850_evm_ui_expander_teardown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) .names = da850_evm_ui_exp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static struct pca953x_platform_data da850_evm_bb_expander_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .setup = da850_evm_bb_expander_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .teardown = da850_evm_bb_expander_teardown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) .names = da850_evm_bb_exp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) I2C_BOARD_INFO("tlv320aic3x", 0x18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) I2C_BOARD_INFO("tca6416", 0x20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .dev_name = "ui-expander",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .platform_data = &da850_evm_ui_expander_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) I2C_BOARD_INFO("tca6416", 0x21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .dev_name = "bb-expander",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .platform_data = &da850_evm_bb_expander_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .bus_freq = 100, /* kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .bus_delay = 0, /* usec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) /* davinci da850 evm audio machine driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static u8 da850_iis_serializer_direction[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static struct snd_platform_data da850_evm_snd_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .tx_dma_offset = 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .rx_dma_offset = 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .op_mode = DAVINCI_MCASP_IIS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .tdm_slots = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .serial_dir = da850_iis_serializer_direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) .asp_chan_q = EVENTQ_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) .ram_chan_q = EVENTQ_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) .version = MCASP_VERSION_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .txnumevt = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .rxnumevt = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .sram_size_playback = SZ_8K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) .sram_size_capture = SZ_8K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static const short da850_evm_mcasp_pins[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) DA850_AXR_11, DA850_AXR_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static struct gpiod_lookup_table mmc_gpios_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .dev_id = "da830-mmc.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) /* gpio chip 2 contains gpio range 64-95 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) GPIO_LOOKUP("davinci_gpio", DA850_MMCSD_CD_PIN, "cd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) GPIO_LOOKUP("davinci_gpio", DA850_MMCSD_WP_PIN, "wp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) static struct davinci_mmc_config da850_mmc_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) .wires = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) .max_freq = 50000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static const short da850_evm_mmcsd0_pins[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) DA850_GPIO4_0, DA850_GPIO4_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static struct property_entry da850_lcd_backlight_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) PROPERTY_ENTRY_BOOL("default-on"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) static struct gpiod_lookup_table da850_lcd_backlight_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) .dev_id = "gpio-backlight",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) GPIO_LOOKUP("davinci_gpio", DA850_LCD_BL_PIN, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) static const struct platform_device_info da850_lcd_backlight_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .name = "gpio-backlight",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) .id = PLATFORM_DEVID_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .properties = da850_lcd_backlight_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) static struct regulator_consumer_supply da850_lcd_supplies[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) REGULATOR_SUPPLY("lcd", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static struct regulator_init_data da850_lcd_supply_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) .consumer_supplies = da850_lcd_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) .num_consumer_supplies = ARRAY_SIZE(da850_lcd_supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) static struct fixed_voltage_config da850_lcd_supply = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) .supply_name = "lcd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .microvolts = 33000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) .init_data = &da850_lcd_supply_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) static struct platform_device da850_lcd_supply_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .name = "reg-fixed-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .id = 1, /* Dummy fixed regulator is 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .platform_data = &da850_lcd_supply,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) static struct gpiod_lookup_table da850_lcd_supply_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .dev_id = "reg-fixed-voltage.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) GPIO_LOOKUP("davinci_gpio", DA850_LCD_PWR_PIN, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static struct gpiod_lookup_table *da850_lcd_gpio_lookups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) &da850_lcd_backlight_gpio_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) &da850_lcd_supply_gpio_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static int da850_lcd_hw_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) struct platform_device *backlight;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) gpiod_add_lookup_tables(da850_lcd_gpio_lookups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) ARRAY_SIZE(da850_lcd_gpio_lookups));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) backlight = platform_device_register_full(&da850_lcd_backlight_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) if (IS_ERR(backlight))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) return PTR_ERR(backlight);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) status = platform_device_register(&da850_lcd_supply_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /* Fixed regulator support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) static struct regulator_consumer_supply fixed_supplies[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) /* Baseboard 3.3V: 5V -> TPS73701DCQ -> 3.3V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) REGULATOR_SUPPLY("AVDD", "1-0018"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) REGULATOR_SUPPLY("DRVDD", "1-0018"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) /* Baseboard 1.8V: 5V -> TPS73701DCQ -> 1.8V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) REGULATOR_SUPPLY("DVDD", "1-0018"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) /* UI card 3.3V: 5V -> TPS73701DCQ -> 3.3V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) REGULATOR_SUPPLY("vcc", "1-0020"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) /* TPS65070 voltage regulator support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) /* 3.3V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) .supply = "usb0_vdda33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) .supply = "usb1_vdda33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) /* 3.3V or 1.8V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) .supply = "dvdd3318_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) .supply = "dvdd3318_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .supply = "dvdd3318_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) REGULATOR_SUPPLY("IOVDD", "1-0018"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) /* 1.2V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) .supply = "cvdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) /* 1.8V LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .supply = "sata_vddr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) .supply = "usb0_vdda18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) .supply = "usb1_vdda18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) .supply = "ddr_dvdd18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) /* 1.2V LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) .supply = "sata_vdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) .supply = "pll0_vdda",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) .supply = "pll1_vdda",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) .supply = "usbs_cvdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .supply = "vddarnwa1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) /* We take advantage of the fact that both defdcdc{2,3} are tied high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) static struct tps6507x_reg_platform_data tps6507x_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) .defdcdc_default = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) static struct regulator_init_data tps65070_regulator_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) /* dcdc1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .min_uV = 3150000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .max_uV = 3450000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) REGULATOR_CHANGE_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .consumer_supplies = tps65070_dcdc1_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) /* dcdc2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) .min_uV = 1710000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) .max_uV = 3450000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) REGULATOR_CHANGE_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) .consumer_supplies = tps65070_dcdc2_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) .driver_data = &tps6507x_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) /* dcdc3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) .min_uV = 950000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .max_uV = 1350000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) REGULATOR_CHANGE_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) .consumer_supplies = tps65070_dcdc3_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) .driver_data = &tps6507x_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) /* ldo1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) .min_uV = 1710000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) .max_uV = 1890000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) REGULATOR_CHANGE_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) .consumer_supplies = tps65070_ldo1_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) /* ldo2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) .min_uV = 1140000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) .max_uV = 1320000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) REGULATOR_CHANGE_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) .consumer_supplies = tps65070_ldo2_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) static struct touchscreen_init_data tps6507x_touchscreen_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) .poll_period = 30, /* ms between touch samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) .min_pressure = 0x30, /* minimum pressure to trigger touch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) .vendor = 0, /* /sys/class/input/input?/id/vendor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) .product = 65070, /* /sys/class/input/input?/id/product */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) .version = 0x100, /* /sys/class/input/input?/id/version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) static struct tps6507x_board tps_board = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) I2C_BOARD_INFO("tps6507x", 0x48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) .platform_data = &tps_board,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) static int __init pmic_tps65070_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) return i2c_register_board_info(1, da850_evm_tps65070_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) ARRAY_SIZE(da850_evm_tps65070_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) static const short da850_evm_lcdc_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) DA850_GPIO2_8, DA850_GPIO2_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) static const short da850_evm_mii_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) DA850_MDIO_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) static const short da850_evm_rmii_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) DA850_MDIO_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) static struct gpiod_hog da850_evm_emac_gpio_hogs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) .chip_label = "davinci_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) .chip_hwnum = DA850_MII_MDIO_CLKEN_PIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) .line_name = "mdio_clk_en",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) .lflags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) /* dflags set in da850_evm_config_emac() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) static int __init da850_evm_config_emac(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) void __iomem *cfg_chip3_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) struct davinci_soc_info *soc_info = &davinci_soc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) u8 rmii_en = soc_info->emac_pdata->rmii_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) if (!machine_is_davinci_da850_evm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) val = __raw_readl(cfg_chip3_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) if (rmii_en) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) val |= BIT(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) pr_info("EMAC: RMII PHY configured, MII PHY will not be"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) " functional\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) val &= ~BIT(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) ret = davinci_cfg_reg_list(da850_evm_mii_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) pr_info("EMAC: MII PHY configured, RMII PHY will not be"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) " functional\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) /* configure the CFGCHIP3 register for RMII or MII */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) __raw_writel(val, cfg_chip3_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) ret = davinci_cfg_reg(DA850_GPIO2_6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) da850_evm_emac_gpio_hogs[0].dflags = rmii_en ? GPIOD_OUT_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) : GPIOD_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) gpiod_add_hogs(da850_evm_emac_gpio_hogs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) ret = da8xx_register_emac();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) device_initcall(da850_evm_config_emac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) * The following EDMA channels/slots are not being used by drivers (for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) * they are being reserved for codecs on the DSP side.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) static const s16 da850_dma0_rsv_chans[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) { 8, 6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) {24, 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) {30, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) static const s16 da850_dma0_rsv_slots[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) { 8, 6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) {24, 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) {30, 50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) static const s16 da850_dma1_rsv_chans[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) { 0, 28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) {30, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) static const s16 da850_dma1_rsv_slots[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) { 0, 28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) {30, 90},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) static struct edma_rsv_info da850_edma_cc0_rsv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) .rsv_chans = da850_dma0_rsv_chans,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) .rsv_slots = da850_dma0_rsv_slots,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) static struct edma_rsv_info da850_edma_cc1_rsv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) .rsv_chans = da850_dma1_rsv_chans,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) .rsv_slots = da850_dma1_rsv_slots,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) static struct edma_rsv_info *da850_edma_rsv[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) &da850_edma_cc0_rsv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) &da850_edma_cc1_rsv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) #ifdef CONFIG_CPU_FREQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) static __init int da850_evm_init_cpufreq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) switch (system_rev & 0xF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) da850_max_speed = 456000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) da850_max_speed = 408000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) da850_max_speed = 372000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) return da850_register_cpufreq("pll0_sysclk3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) static __init int da850_evm_init_cpufreq(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) #if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) #define TVP5147_CH0 "tvp514x-0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) #define TVP5147_CH1 "tvp514x-1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) /* VPIF capture configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) static struct tvp514x_platform_data tvp5146_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) .clk_polarity = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) .hs_polarity = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) .vs_polarity = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) static struct vpif_input da850_ch0_inputs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) .input = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) .index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) .name = "Composite",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) .type = V4L2_INPUT_TYPE_CAMERA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) .capabilities = V4L2_IN_CAP_STD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) .std = TVP514X_STD_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) .input_route = INPUT_CVBS_VI2B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) .subdev_name = TVP5147_CH0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) static struct vpif_input da850_ch1_inputs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) .input = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) .index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) .name = "S-Video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) .type = V4L2_INPUT_TYPE_CAMERA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) .capabilities = V4L2_IN_CAP_STD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) .std = TVP514X_STD_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) .input_route = INPUT_SVIDEO_VI2C_VI1C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) .subdev_name = TVP5147_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) .name = TVP5147_CH0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) .board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) I2C_BOARD_INFO("tvp5146", 0x5d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) .platform_data = &tvp5146_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) .name = TVP5147_CH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) .board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) I2C_BOARD_INFO("tvp5146", 0x5c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) .platform_data = &tvp5146_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) static struct vpif_capture_config da850_vpif_capture_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) .subdev_info = da850_vpif_capture_sdev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) .i2c_adapter_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) .chan_config[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) .inputs = da850_ch0_inputs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) .input_count = ARRAY_SIZE(da850_ch0_inputs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) .vpif_if = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) .if_type = VPIF_IF_BT656,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) .hd_pol = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) .vd_pol = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) .fid_pol = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) .chan_config[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) .inputs = da850_ch1_inputs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) .input_count = ARRAY_SIZE(da850_ch1_inputs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) .vpif_if = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) .if_type = VPIF_IF_BT656,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) .hd_pol = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) .vd_pol = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) .fid_pol = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) .card_name = "DA850/OMAP-L138 Video Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) /* VPIF display configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) static struct adv7343_platform_data adv7343_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) .mode_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) .dac = { 1, 1, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) .sd_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) .sd_dac_out = { 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) static struct vpif_subdev_info da850_vpif_subdev[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) .name = "adv7343",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) .board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) I2C_BOARD_INFO("adv7343", 0x2a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) .platform_data = &adv7343_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) static const struct vpif_output da850_ch0_outputs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) .output = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) .index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) .name = "Composite",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) .type = V4L2_OUTPUT_TYPE_ANALOG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) .capabilities = V4L2_OUT_CAP_STD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) .std = V4L2_STD_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) .subdev_name = "adv7343",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) .output_route = ADV7343_COMPOSITE_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) .output = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) .index = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) .name = "S-Video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) .type = V4L2_OUTPUT_TYPE_ANALOG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) .capabilities = V4L2_OUT_CAP_STD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) .std = V4L2_STD_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) .subdev_name = "adv7343",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) .output_route = ADV7343_SVIDEO_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) static struct vpif_display_config da850_vpif_display_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) .subdevinfo = da850_vpif_subdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) .chan_config[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) .outputs = da850_ch0_outputs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) .output_count = ARRAY_SIZE(da850_ch0_outputs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) .card_name = "DA850/OMAP-L138 Video Display",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) .i2c_adapter_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) static __init void da850_vpif_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) ret = da850_register_vpif();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) ret = da850_register_vpif_capture(&da850_vpif_capture_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) ret = davinci_cfg_reg_list(da850_vpif_display_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) ret = da850_register_vpif_display(&da850_vpif_display_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) static __init void da850_vpif_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) static __init void da850_evm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) da850_register_clocks();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) ret = da850_register_gpio();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) regulator_register_fixed(0, fixed_supplies, ARRAY_SIZE(fixed_supplies));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) ret = pmic_tps65070_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) ret = da850_register_edma(da850_edma_rsv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) ret = davinci_cfg_reg_list(da850_i2c0_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) ret = da8xx_register_watchdog();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) pr_warn("%s: watchdog registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (HAS_MMC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) pr_warn("%s: MMCSD0 mux setup failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) gpiod_add_lookup_table(&mmc_gpios_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) ret = da8xx_register_mmcsd0(&da850_mmc_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) pr_warn("%s: MMCSD0 registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) davinci_serial_init(da8xx_serial_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) nvmem_add_cell_table(&da850evm_nvmem_cell_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) nvmem_add_cell_lookups(&da850evm_nvmem_cell_lookup, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) i2c_register_board_info(1, da850_evm_i2c_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) ARRAY_SIZE(da850_evm_i2c_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) * shut down uart 0 and 1; they are not used on the board and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) * accessing them causes endless "too much work in irq53" messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) * with arago fs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) da850_evm_snd_data.sram_pool = sram_get_gen_pool();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) da8xx_register_mcasp(0, &da850_evm_snd_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) ret = da8xx_register_uio_pruss();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) pr_warn("da850_evm_init: pruss initialization failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) /* Handle board specific muxing for LCD here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) pr_warn("%s: EVM specific LCD mux setup failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) ret = da850_lcd_hw_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) pr_warn("%s: LCD initialization failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) pr_warn("%s: LCDC registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) ret = da8xx_register_rtc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) pr_warn("%s: RTC setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) ret = da850_evm_init_cpufreq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) ret = da8xx_register_cpuidle();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) davinci_pm_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) da850_vpif_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) ret = spi_register_board_info(da850evm_spi_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) ARRAY_SIZE(da850evm_spi_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) pr_warn("%s: spi info registration failed: %d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) pr_warn("%s: SATA registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) ret = da8xx_register_rproc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) pr_warn("%s: dsp/rproc registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) #ifdef CONFIG_SERIAL_8250_CONSOLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) static int __init da850_evm_console_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) if (!machine_is_davinci_da850_evm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) return add_preferred_console("ttyS", 2, "115200");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) console_initcall(da850_evm_console_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) static void __init da850_evm_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) da850_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) .map_io = da850_evm_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) .init_irq = da850_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) .init_time = da850_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) .init_machine = da850_evm_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) .init_late = davinci_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) .dma_zone_size = SZ_128M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) .reserve = da8xx_rproc_reserve_cma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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