^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * TI DA830/OMAP L137 EVM board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Mark A. Greer <mgreer@mvista.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * the terms of the GNU General Public License version 2. This program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * is licensed "as is" without any warranty of any kind, whether express
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_data/pcf857x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/spi/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/platform_data/gpio-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/platform_data/mtd-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/platform_data/mtd-davinci-aemif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/platform_data/spi-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/platform_data/usb-davinci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/platform_data/ti-aemif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/nvmem-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <mach/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <mach/da8xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define DA830_EVM_PHY_ID ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const short da830_evm_usb11_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) DA830_GPIO1_15, DA830_GPIO2_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static struct regulator_consumer_supply da830_evm_usb_supplies[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) REGULATOR_SUPPLY("vbus", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static struct regulator_init_data da830_evm_usb_vbus_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .consumer_supplies = da830_evm_usb_supplies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .num_consumer_supplies = ARRAY_SIZE(da830_evm_usb_supplies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static struct fixed_voltage_config da830_evm_usb_vbus = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .supply_name = "vbus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .microvolts = 33000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .init_data = &da830_evm_usb_vbus_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static struct platform_device da830_evm_usb_vbus_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .name = "reg-fixed-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .platform_data = &da830_evm_usb_vbus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static struct gpiod_lookup_table da830_evm_usb_oc_gpio_lookup = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .dev_id = "ohci-da8xx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) GPIO_LOOKUP("davinci_gpio", ON_BD_USB_OVC, "oc", 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static struct gpiod_lookup_table da830_evm_usb_vbus_gpio_lookup = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .dev_id = "reg-fixed-voltage.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) GPIO_LOOKUP("davinci_gpio", ON_BD_USB_DRV, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static struct gpiod_lookup_table *da830_evm_usb_gpio_lookups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) &da830_evm_usb_oc_gpio_lookup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) &da830_evm_usb_vbus_gpio_lookup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* TPS2065 switch @ 5V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .potpgt = (3 + 1) / 2, /* 3 ms max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static __init void da830_evm_usb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ret = da8xx_register_usb_phy_clocks();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) pr_warn("%s: USB PHY CLK registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) gpiod_add_lookup_tables(da830_evm_usb_gpio_lookups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ARRAY_SIZE(da830_evm_usb_gpio_lookups));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ret = da8xx_register_usb_phy();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) pr_warn("%s: USB PHY registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * with the power on to power good time of 3 ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ret = da8xx_register_usb20(1000, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) pr_warn("%s: USB 2.0 registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ret = platform_device_register(&da830_evm_usb_vbus_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) pr_warn("%s: Unable to register the vbus supply\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static const short da830_evm_mcasp1_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DA830_AXR1_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static u8 da830_iis_serializer_direction[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static struct snd_platform_data da830_evm_snd_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .tx_dma_offset = 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .rx_dma_offset = 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .op_mode = DAVINCI_MCASP_IIS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .tdm_slots = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .serial_dir = da830_iis_serializer_direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .asp_chan_q = EVENTQ_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .version = MCASP_VERSION_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .txnumevt = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .rxnumevt = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static const short da830_evm_mmc_sd_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static struct gpiod_lookup_table mmc_gpios_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .dev_id = "da830-mmc.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* gpio chip 1 contains gpio range 32-63 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_CD_PIN, "cd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_WP_PIN, "wp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static struct davinci_mmc_config da830_evm_mmc_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .wires = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .max_freq = 50000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static inline void da830_evm_init_mmc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) gpiod_add_lookup_table(&mmc_gpios_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) gpiod_remove_lookup_table(&mmc_gpios_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #ifdef CONFIG_DA830_UI_NAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static struct mtd_partition da830_evm_nand_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* bootloader (U-Boot, etc) in first sector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .name = "bootloader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .size = SZ_128K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .mask_flags = MTD_WRITEABLE, /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* bootloader params in the next sector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .name = "params",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .size = SZ_128K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .mask_flags = MTD_WRITEABLE, /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .name = "kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .size = SZ_2M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* file system */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) [3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .name = "filesystem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* flash bbt descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) NAND_BBT_WRITE | NAND_BBT_2BIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) NAND_BBT_VERSION | NAND_BBT_PERCHIP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .offs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .veroffs = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .maxblocks = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .pattern = da830_evm_nand_bbt_pattern
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) NAND_BBT_WRITE | NAND_BBT_2BIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) NAND_BBT_VERSION | NAND_BBT_PERCHIP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .offs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .veroffs = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .maxblocks = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .pattern = da830_evm_nand_mirror_pattern
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static struct davinci_aemif_timing da830_evm_nandflash_timing = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .wsetup = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .wstrobe = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .whold = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .rsetup = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .rstrobe = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .rhold = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .ta = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static struct davinci_nand_pdata da830_evm_nand_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .core_chipsel = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .parts = da830_evm_nand_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .ecc_bits = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .bbt_options = NAND_BBT_USE_FLASH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .bbt_td = &da830_evm_nand_bbt_main_descr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .bbt_md = &da830_evm_nand_bbt_mirror_descr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .timing = &da830_evm_nandflash_timing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static struct resource da830_evm_nand_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) [0] = { /* First memory resource is NAND I/O window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .start = DA8XX_AEMIF_CS3_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) [1] = { /* Second memory resource is AEMIF control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .start = DA8XX_AEMIF_CTL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static struct platform_device da830_evm_aemif_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .name = "davinci_nand",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .platform_data = &da830_evm_nand_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .resource = da830_evm_nand_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static struct resource da830_evm_aemif_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .start = DA8XX_AEMIF_CTL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static struct aemif_abus_data da830_evm_aemif_abus_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .cs = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static struct aemif_platform_data da830_evm_aemif_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .abus_data = da830_evm_aemif_abus_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .num_abus_data = ARRAY_SIZE(da830_evm_aemif_abus_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .sub_devices = da830_evm_aemif_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .num_sub_devices = ARRAY_SIZE(da830_evm_aemif_devices),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .cs_offset = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static struct platform_device da830_evm_aemif_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .name = "ti-aemif",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .platform_data = &da830_evm_aemif_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .resource = da830_evm_aemif_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .num_resources = ARRAY_SIZE(da830_evm_aemif_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * UI board NAND/NOR flashes only use 8-bit data bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static const short da830_evm_emif25_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static inline void da830_evm_init_nand(int mux_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) if (HAS_MMC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) "\tDisable MMC/SD for NAND support\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) ret = platform_device_register(&da830_evm_aemif_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) pr_warn("%s: AEMIF device not registered\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) gpio_direction_output(mux_mode, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static inline void da830_evm_init_nand(int mux_mode) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #ifdef CONFIG_DA830_UI_LCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static inline void da830_evm_init_lcdc(int mux_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) pr_warn("%s: lcd setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) gpio_direction_output(mux_mode, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static inline void da830_evm_init_lcdc(int mux_mode) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static struct nvmem_cell_info da830_evm_nvmem_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .name = "macaddr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .offset = 0x7f00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .bytes = ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static struct nvmem_cell_table da830_evm_nvmem_cell_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .nvmem_name = "1-00500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .cells = da830_evm_nvmem_cells,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .ncells = ARRAY_SIZE(da830_evm_nvmem_cells),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static struct nvmem_cell_lookup da830_evm_nvmem_cell_lookup = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .nvmem_name = "1-00500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .cell_name = "macaddr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .dev_id = "davinci_emac.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .con_id = "mac-address",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static const struct property_entry da830_evm_i2c_eeprom_properties[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) PROPERTY_ENTRY_U32("pagesize", 64),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) int gpio, unsigned ngpio, void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) gpio_request(gpio + 6, "UI MUX_MODE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) /* Drive mux mode low to match the default without UI card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) gpio_direction_output(gpio + 6, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) da830_evm_init_lcdc(gpio + 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) da830_evm_init_nand(gpio + 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) unsigned ngpio, void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) gpio_free(gpio + 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .gpio_base = DAVINCI_N_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .setup = da830_evm_ui_expander_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .teardown = da830_evm_ui_expander_teardown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) I2C_BOARD_INFO("24c256", 0x50),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .properties = da830_evm_i2c_eeprom_properties,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) I2C_BOARD_INFO("tlv320aic3x", 0x18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) I2C_BOARD_INFO("pcf8574", 0x3f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .platform_data = &da830_evm_ui_expander_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .bus_freq = 100, /* kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .bus_delay = 0, /* usec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) * The following EDMA channels/slots are not being used by drivers (for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * they are being reserved for codecs on the DSP side.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static const s16 da830_dma_rsv_chans[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) { 8, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {12, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {24, 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {30, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static const s16 da830_dma_rsv_slots[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /* (offset, number) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) { 8, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {12, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {24, 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {30, 26},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {-1, -1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static struct edma_rsv_info da830_edma_rsv[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .rsv_chans = da830_dma_rsv_chans,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .rsv_slots = da830_dma_rsv_slots,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static struct mtd_partition da830evm_spiflash_part[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) .name = "DSP-UBL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .size = SZ_8K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .name = "ARM-UBL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .size = SZ_16K + SZ_8K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .name = "U-Boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .size = SZ_256K - SZ_32K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .mask_flags = MTD_WRITEABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) [3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .name = "U-Boot-Environment",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .size = SZ_16K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) [4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .name = "Kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .mask_flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) static struct flash_platform_data da830evm_spiflash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .name = "m25p80",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) .parts = da830evm_spiflash_part,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .type = "w25x32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) static struct davinci_spi_config da830evm_spiflash_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .io_type = SPI_IO_TYPE_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .c2tdelay = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) .t2cdelay = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static struct spi_board_info da830evm_spi_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .modalias = "m25p80",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .platform_data = &da830evm_spiflash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .controller_data = &da830evm_spiflash_cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .mode = SPI_MODE_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .max_speed_hz = 30000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) .bus_num = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) .chip_select = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static __init void da830_evm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) struct davinci_soc_info *soc_info = &davinci_soc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) da830_register_clocks();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) ret = da830_register_gpio();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) ret = da830_register_edma(da830_edma_rsv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) pr_warn("%s: edma registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) ret = davinci_cfg_reg_list(da830_i2c0_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) da830_evm_usb_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) soc_info->emac_pdata->rmii_en = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) ret = davinci_cfg_reg_list(da830_cpgmac_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) ret = da8xx_register_emac();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) pr_warn("%s: emac registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) ret = da8xx_register_watchdog();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) pr_warn("%s: watchdog registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) davinci_serial_init(da8xx_serial_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) nvmem_add_cell_table(&da830_evm_nvmem_cell_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) nvmem_add_cell_lookups(&da830_evm_nvmem_cell_lookup, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) i2c_register_board_info(1, da830_evm_i2c_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) ARRAY_SIZE(da830_evm_i2c_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) da8xx_register_mcasp(1, &da830_evm_snd_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) da830_evm_init_mmc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) ret = da8xx_register_rtc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) pr_warn("%s: rtc setup failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) ret = spi_register_board_info(da830evm_spi_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) ARRAY_SIZE(da830evm_spi_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) pr_warn("%s: spi info registration failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) #ifdef CONFIG_SERIAL_8250_CONSOLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static int __init da830_evm_console_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (!machine_is_davinci_da830_evm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return add_preferred_console("ttyS", 2, "115200");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) console_initcall(da830_evm_console_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) static void __init da830_evm_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) da830_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .map_io = da830_evm_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .init_irq = da830_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .init_time = da830_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .init_machine = da830_evm_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .init_late = davinci_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) .dma_zone_size = SZ_128M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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