^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AT91 Power Management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2005 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __ARCH_ARM_MACH_AT91_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __ARCH_ARM_MACH_AT91_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/proc-fns.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/syscon/atmel-mc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <soc/at91/at91sam9_ddrsdr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <soc/at91/at91sam9_sdramc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define AT91_MEMCTRL_MC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define AT91_MEMCTRL_SDRAMC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define AT91_MEMCTRL_DDRSDR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define AT91_PM_STANDBY 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define AT91_PM_ULP0 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define AT91_PM_ULP0_FAST 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define AT91_PM_ULP1 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AT91_PM_BACKUP 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct at91_pm_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) void __iomem *pmc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void __iomem *ramc[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long uhp_udp_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int memctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) void __iomem *shdwc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void __iomem *sfrbu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned int standby_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned int suspend_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned int pmc_mckr_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int pmc_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #endif