Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * ARTPEC-6 device support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/amba/bus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irqchip/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/smp_scu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/psci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/arm-smccc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ARTPEC6_DMACFG_REGNUM 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ARTPEC6_DMACFG_UARTS_BURST 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SECURE_OP_L2C_WRITEREG 0xb4000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void __init artpec6_init_machine(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	regmap = syscon_regmap_lookup_by_compatible("axis,artpec6-syscon");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	if (!IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		/* Use PL011 DMA Burst Request signal instead of DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		 *  Single Request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		regmap_write(regmap, ARTPEC6_DMACFG_REGNUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			     ARTPEC6_DMACFG_UARTS_BURST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static void artpec6_l2c310_write_sec(unsigned long val, unsigned reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	struct arm_smccc_res res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	arm_smccc_smc(SECURE_OP_L2C_WRITEREG, reg, val, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		      0, 0, 0, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	WARN_ON(res.a0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const char * const artpec6_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	"axis,artpec6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) DT_MACHINE_START(ARTPEC6, "Axis ARTPEC-6 Platform")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	.l2c_aux_val	= 0x0C000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	.l2c_aux_mask	= 0xF3FFFFFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	.l2c_write_sec  = artpec6_l2c310_write_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	.init_machine	= artpec6_init_machine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	.dt_compat	= artpec6_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MACHINE_END