^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/lib/io-writesw-armv4.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1995-2000 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) .macro outword, rd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __ARMEB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) strh \rd, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) mov \rd, \rd, lsr #16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) strh \rd, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) mov lr, \rd, lsr #16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) strh lr, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) strh \rd, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .Loutsw_align: movs ip, r1, lsl #31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) bne .Loutsw_noalign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) ldrh r3, [r1], #2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) sub r2, r2, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) strh r3, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ENTRY(__raw_writesw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) teq r2, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) reteq lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ands r3, r1, #3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bne .Loutsw_align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) stmfd sp!, {r4, r5, lr}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) subs r2, r2, #8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) bmi .Lno_outsw_8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .Loutsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) subs r2, r2, #8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) outword r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) outword r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) outword r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) outword ip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bpl .Loutsw_8_lp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .Lno_outsw_8: tst r2, #4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) beq .Lno_outsw_4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ldmia r1!, {r3, ip}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) outword r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) outword ip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .Lno_outsw_4: movs r2, r2, lsl #31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) bcc .Lno_outsw_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ldr r3, [r1], #4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) outword r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .Lno_outsw_2: ldrhne r3, [r1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) strhne r3, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ldmfd sp!, {r4, r5, pc}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #ifdef __ARMEB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define pull_hbyte0 lsl #8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define push_hbyte1 lsr #24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define pull_hbyte0 lsr #24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define push_hbyte1 lsl #8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .Loutsw_noalign:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ARM( ldr r3, [r1, -r3]! )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) THUMB( rsb r3, r3, #0 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) THUMB( ldr r3, [r1, r3] )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) THUMB( sub r1, r3 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) subcs r2, r2, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) bcs 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) subs r2, r2, #2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) bmi 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 1: mov ip, r3, lsr #8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) strh ip, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 2: mov ip, r3, pull_hbyte0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ldr r3, [r1, #4]!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) subs r2, r2, #2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) orr ip, ip, r3, push_hbyte1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) strh ip, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) bpl 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) tst r2, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 3: movne ip, r3, lsr #8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) strhne ip, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ret lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ENDPROC(__raw_writesw)