Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  linux/arch/arm/lib/delay.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 1995, 1996 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <asm/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 		.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) .LC0:		.word	loops_per_jiffy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) .LC1:		.word	UDELAY_MULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * loops = r0 * HZ * loops_per_jiffy / 1000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * r0  <= 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * HZ  <= 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) ENTRY(__loop_udelay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		ldr	r2, .LC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		mul	r0, r2, r0		@ r0 = delay_us * UDELAY_MULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) ENTRY(__loop_const_udelay)			@ 0 <= r0 <= 0xfffffaf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		ldr	r2, .LC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		ldr	r2, [r2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		umull	r1, r0, r2, r0		@ r0-r1 = r0 * loops_per_jiffy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		adds	r1, r1, #0xffffffff	@ rounding up ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		adcs	r0, r0, r0		@ and right shift by 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		reteq	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		.align 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) @ Delay routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ENTRY(__loop_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		retls	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		retls	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		retls	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		retls	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		retls	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		retls	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		retls	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		subs	r0, r0, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		bhi	__loop_delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		ret	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ENDPROC(__loop_udelay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ENDPROC(__loop_const_udelay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ENDPROC(__loop_delay)