^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* ld script to make ARM Linux kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * taken from the i386 version by Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /* No __ro_after_init data in the .rodata section - which will always be ro */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define RO_AFTER_INIT_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/vmlinux.lds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/mpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) OUTPUT_ARCH(arm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) ENTRY(stext)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifndef __ARMEB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) jiffies = jiffies_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) jiffies = jiffies_64 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SECTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * XXX: The linker does not define how output sections are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * assigned to input sections when there are multiple statements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * matching the same input section name. There is no documented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * order of matching.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * unwind exit sections must be discarded before the rest of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * unwind sections get included.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /DISCARD/ : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ARM_DISCARD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *(.alt.smp.init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *(.pv_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #ifndef CONFIG_ARM_UNWIND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *(.ARM.exidx) *(.ARM.exidx.*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *(.ARM.extab) *(.ARM.extab.*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) . = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) _xiprom = .; /* XIP ROM area to be mapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .head.text : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) _text = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) HEAD_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .text : { /* Real text segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) _stext = .; /* Text and read-only data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ARM_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) RO_DATA(PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) . = ALIGN(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) __start___ex_table = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ARM_MMU_KEEP(*(__ex_table))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) __stop___ex_table = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #ifdef CONFIG_ARM_UNWIND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ARM_UNWIND_SECTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) _etext = .; /* End of text and rodata section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ARM_VECTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) INIT_TEXT_SECTION(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .exit.text : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ARM_EXIT_KEEP(EXIT_TEXT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .init.proc.info : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ARM_CPU_DISCARD(PROC_INFO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .init.arch.info : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) __arch_info_begin = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) *(.arch.info.init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) __arch_info_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .init.tagtable : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) __tagtable_begin = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) *(.taglist.init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) __tagtable_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .init.rodata : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) INIT_SETUP(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) INIT_CALLS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) CON_INITCALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) INIT_RAM_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #ifdef CONFIG_ARM_MPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) . = ALIGN(SZ_128K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) _exiprom = .; /* End of XIP ROM area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * From this point, stuff is considered writable and will be copied to RAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) __data_loc = ALIGN(4); /* location in file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) . = PAGE_OFFSET + TEXT_OFFSET; /* location in memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #undef LOAD_OFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) . = ALIGN(THREAD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) _sdata = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *(.data..ro_after_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) _edata = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) . = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) __init_begin = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) INIT_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ARM_EXIT_KEEP(EXIT_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PERCPU_SECTION(L1_CACHE_BYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #ifdef CONFIG_HAVE_TCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ARM_TCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * End of copied data. We need a dummy section to get its LMA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * Also located before final ALIGN() as trailing padding is not stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * in the resulting binary file and useless to copy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) _edata_loc = LOADADDR(.data.endmark);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) . = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) __init_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) BSS_SECTION(0, 0, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #ifdef CONFIG_ARM_MPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) . = ALIGN(PMSAv8_MINALIGN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) _end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) STABS_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) DWARF_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ARM_DETAILS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ARM_ASSERTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * These must never be empty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * If you have to comment these two assert statements out, your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * binutils is too old (for other reasons as well)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #ifdef CONFIG_XIP_DEFLATED_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * The .bss is used as a stack area for __inflate_kernel_data() whose stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * frame is 9568 bytes. Make sure it has extra room left.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #if defined(CONFIG_ARM_MPU) && !defined(CONFIG_COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * Due to PMSAv7 restriction on base address and size we have to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * enforce minimal alignment restrictions. It was seen that weaker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * alignment restriction on _xiprom will likely force XIP address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * space spawns multiple MPU regions thus it is likely we run in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * situation when we are reprogramming MPU region we run on with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * something which doesn't cover reprogramming code itself, so as soon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * as we update MPU settings we'd immediately try to execute straight
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * from background region which is XN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * It seem that alignment in 1M should suit most users.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * _exiprom is aligned as 1/8 of 1M so can be covered by subregion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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