^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/kernel/smp_tlb.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2002 ARM Limited, All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/preempt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/smp_plat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /**********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * TLB operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct tlb_args {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct vm_area_struct *ta_vma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned long ta_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned long ta_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static inline void ipi_flush_tlb_all(void *ignored)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) local_flush_tlb_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static inline void ipi_flush_tlb_mm(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct mm_struct *mm = (struct mm_struct *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) local_flush_tlb_mm(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static inline void ipi_flush_tlb_page(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct tlb_args *ta = (struct tlb_args *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned int __ua_flags = uaccess_save_and_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) local_flush_tlb_page(ta->ta_vma, ta->ta_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) uaccess_restore(__ua_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static inline void ipi_flush_tlb_kernel_page(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct tlb_args *ta = (struct tlb_args *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) local_flush_tlb_kernel_page(ta->ta_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static inline void ipi_flush_tlb_range(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct tlb_args *ta = (struct tlb_args *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned int __ua_flags = uaccess_save_and_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) uaccess_restore(__ua_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static inline void ipi_flush_tlb_kernel_range(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct tlb_args *ta = (struct tlb_args *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline void ipi_flush_bp_all(void *ignored)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) local_flush_bp_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #ifdef CONFIG_ARM_ERRATA_798181
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) bool (*erratum_a15_798181_handler)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static bool erratum_a15_798181_partial(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dsb(ish);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static bool erratum_a15_798181_broadcast(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) dsb(ish);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) void erratum_a15_798181_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned int midr = read_cpuid_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned int revidr = read_cpuid(CPUID_REVIDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Brahma-B15 r0p0..r0p2 affected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * Cortex-A15 r0p0..r3p3 w/o ECO fix affected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * Fixes applied to A15 with respect to the revision and revidr are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * r0p0-r2p1: No fixes applied
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * r2p2,r2p3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * REVIDR[4]: 798181 Moving a virtual page that is being accessed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * by an active process can lead to unexpected behavior
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * REVIDR[9]: Not defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * r2p4,r3p0,r3p1,r3p2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * REVIDR[4]: 798181 Moving a virtual page that is being accessed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * by an active process can lead to unexpected behavior
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * REVIDR[9]: 798181 Moving a virtual page that is being accessed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * by an active process can lead to unexpected behavior
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * - This is an update to a previously released ECO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * r3p3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * REVIDR[4]: Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * REVIDR[9]: 798181 Moving a virtual page that is being accessed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * by an active process can lead to unexpected behavior
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * - This is an update to a previously released ECO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * Handling:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * REVIDR[9] set -> No WA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * REVIDR[4] set, REVIDR[9] cleared -> Partial WA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * Both cleared -> Full WA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) erratum_a15_798181_handler = erratum_a15_798181_broadcast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) erratum_a15_798181_handler = erratum_a15_798181_broadcast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (revidr & 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) erratum_a15_798181_handler =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) erratum_a15_798181_partial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) erratum_a15_798181_handler =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) erratum_a15_798181_broadcast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if ((revidr & 0x210) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) erratum_a15_798181_handler =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) erratum_a15_798181_broadcast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) else if (revidr & 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) erratum_a15_798181_handler =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) erratum_a15_798181_partial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if ((revidr & 0x200) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) erratum_a15_798181_handler =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) erratum_a15_798181_partial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static void ipi_flush_tlb_a15_erratum(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) dmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static void broadcast_tlb_a15_erratum(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (!erratum_a15_798181())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int this_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) cpumask_t mask = { CPU_BITS_NONE };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (!erratum_a15_798181())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) this_cpu = get_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) a15_erratum_get_cpumask(this_cpu, mm, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) put_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) void flush_tlb_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (tlb_ops_need_broadcast())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) on_each_cpu(ipi_flush_tlb_all, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) __flush_tlb_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) broadcast_tlb_a15_erratum();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) void flush_tlb_mm(struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (tlb_ops_need_broadcast())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) __flush_tlb_mm(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) broadcast_tlb_mm_a15_erratum(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (tlb_ops_need_broadcast()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct tlb_args ta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) ta.ta_vma = vma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ta.ta_start = uaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) &ta, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) __flush_tlb_page(vma, uaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) broadcast_tlb_mm_a15_erratum(vma->vm_mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) void flush_tlb_kernel_page(unsigned long kaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (tlb_ops_need_broadcast()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct tlb_args ta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ta.ta_start = kaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) __flush_tlb_kernel_page(kaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) broadcast_tlb_a15_erratum();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) void flush_tlb_range(struct vm_area_struct *vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (tlb_ops_need_broadcast()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct tlb_args ta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ta.ta_vma = vma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ta.ta_start = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ta.ta_end = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) &ta, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) local_flush_tlb_range(vma, start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) broadcast_tlb_mm_a15_erratum(vma->vm_mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) void flush_tlb_kernel_range(unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (tlb_ops_need_broadcast()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct tlb_args ta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ta.ta_start = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ta.ta_end = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) local_flush_tlb_kernel_range(start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) broadcast_tlb_a15_erratum();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) void flush_bp_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (tlb_ops_need_broadcast())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) on_each_cpu(ipi_flush_bp_all, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) __flush_bp_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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