^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/kernel/pj4-cp0.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * PJ4 iWMMXt coprocessor context switching and handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2010 Marvell International Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/thread_notify.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/cputype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct thread_info *thread = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) case THREAD_NOTIFY_FLUSH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * flush_thread() zeroes thread->fpstate, so no need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * to do anything here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * FALLTHROUGH: Ensure we don't try to overwrite our newly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * initialised state information on the first fault.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) case THREAD_NOTIFY_EXIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) iwmmxt_task_release(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) case THREAD_NOTIFY_SWITCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) iwmmxt_task_switch(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static struct notifier_block __maybe_unused iwmmxt_notifier_block = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .notifier_call = iwmmxt_do,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static u32 __init pj4_cp_access_read(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) __asm__ __volatile__ (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) "mrc p15, 0, %0, c1, c0, 2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) : "=r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void __init pj4_cp_access_write(u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) __asm__ __volatile__ (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) "mcr p15, 0, %1, c1, c0, 2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #ifdef CONFIG_THUMB2_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) "isb\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) "mrc p15, 0, %0, c1, c0, 2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "mov %0, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) "sub pc, pc, #4\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) : "=r" (temp) : "r" (value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int __init pj4_get_iwmmxt_version(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u32 cp_access, wcid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) cp_access = pj4_cp_access_read();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pj4_cp_access_write(cp_access | 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* check if coprocessor 0 and 1 are available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if ((pj4_cp_access_read() & 0xf) != 0xf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pj4_cp_access_write(cp_access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* read iWMMXt coprocessor id register p1, c0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) __asm__ __volatile__ ("mrc p1, 0, %0, c0, c0, 0\n" : "=r" (wcid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) pj4_cp_access_write(cp_access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* iWMMXt v1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if ((wcid & 0xffffff00) == 0x56051000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* iWMMXt v2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if ((wcid & 0xffffff00) == 0x56052000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * switch code handle iWMMXt context switching.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static int __init pj4_cp0_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u32 __maybe_unused cp_access;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int vers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (!cpu_is_pj4())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) vers = pj4_get_iwmmxt_version();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (vers < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #ifndef CONFIG_IWMMXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) pr_info("PJ4 iWMMXt coprocessor detected, but kernel support is missing.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) cp_access = pj4_cp_access_read() & ~0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) pj4_cp_access_write(cp_access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) pr_info("PJ4 iWMMXt v%d coprocessor enabled.\n", vers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) elf_hwcap |= HWCAP_IWMMXT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) thread_register_notifier(&iwmmxt_notifier_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) late_initcall(pj4_cp0_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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