^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/kernel/module.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2002 Russell King.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Modified for nommu by Hyok S. Choi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Module allocation method suggested by Andi Kleen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/moduleloader.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/elf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/sections.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/smp_plat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/unwind.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/opcodes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #ifdef CONFIG_XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * The XIP kernel text is mapped in the module area for modules and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * some other stuff to work without any indirect relocations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #undef MODULES_VADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define MODULES_VADDR (((unsigned long)_exiprom + ~PMD_MASK) & PMD_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) void *module_alloc(unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) gfp_t gfp_mask = GFP_KERNEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) void *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Silence the initial allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) gfp_mask |= __GFP_NOWARN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) gfp_mask, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) __builtin_return_address(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) __builtin_return_address(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) bool module_init_section(const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return strstarts(name, ".init") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) strstarts(name, ".ARM.extab.init") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) strstarts(name, ".ARM.exidx.init");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) bool module_exit_section(const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return strstarts(name, ".exit") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) strstarts(name, ".ARM.extab.exit") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) strstarts(name, ".ARM.exidx.exit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned int relindex, struct module *module)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Elf32_Shdr *symsec = sechdrs + symindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) Elf32_Shdr *relsec = sechdrs + relindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) Elf32_Rel *rel = (void *)relsec->sh_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned long loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) Elf32_Sym *sym;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) const char *symname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) s32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #ifdef CONFIG_THUMB2_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u32 upper, lower, sign, j1, j2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) offset = ELF32_R_SYM(rel->r_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) module->name, relindex, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) symname = strtab + sym->st_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) module->name, relindex, i, symname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) rel->r_offset, dstsec->sh_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) loc = dstsec->sh_addr + rel->r_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) switch (ELF32_R_TYPE(rel->r_info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case R_ARM_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* ignore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) case R_ARM_ABS32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) case R_ARM_TARGET1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) *(u32 *)loc += sym->st_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) case R_ARM_PC24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) case R_ARM_CALL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) case R_ARM_JUMP24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (sym->st_value & 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) module->name, relindex, i, symname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) offset = __mem_to_opcode_arm(*(u32 *)loc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) offset = (offset & 0x00ffffff) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (offset & 0x02000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) offset -= 0x04000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) offset += sym->st_value - loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * Route through a PLT entry if 'offset' exceeds the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * supported range. Note that 'offset + loc + 8'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * contains the absolute jump target, i.e.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * @sym + addend, corrected for the +8 PC bias.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) (offset <= (s32)0xfe000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) offset >= (s32)0x02000000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) offset = get_module_plt(module, loc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) offset + loc + 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) - loc - 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (offset <= (s32)0xfe000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) offset >= (s32)0x02000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) module->name, relindex, i, symname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ELF32_R_TYPE(rel->r_info), loc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) sym->st_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) offset >>= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) offset &= 0x00ffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) *(u32 *)loc &= __opcode_to_mem_arm(0xff000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) *(u32 *)loc |= __opcode_to_mem_arm(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) case R_ARM_V4BX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* Preserve Rm and the condition code. Alter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * other bits to re-code instruction as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * MOV PC,Rm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case R_ARM_PREL31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) offset = (*(s32 *)loc << 1) >> 1; /* sign extend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) offset += sym->st_value - loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (offset >= 0x40000000 || offset < -0x40000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) module->name, relindex, i, symname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ELF32_R_TYPE(rel->r_info), loc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) sym->st_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) *(u32 *)loc &= 0x80000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *(u32 *)loc |= offset & 0x7fffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) case R_ARM_MOVW_ABS_NC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) case R_ARM_MOVT_ABS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) offset = tmp = __mem_to_opcode_arm(*(u32 *)loc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) offset = (offset ^ 0x8000) - 0x8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) offset += sym->st_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) offset >>= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) tmp &= 0xfff0f000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) tmp |= ((offset & 0xf000) << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) (offset & 0x0fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) *(u32 *)loc = __opcode_to_mem_arm(tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #ifdef CONFIG_THUMB2_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) case R_ARM_THM_CALL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) case R_ARM_THM_JUMP24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * For function symbols, only Thumb addresses are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * allowed (no interworking).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * For non-function symbols, the destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * has no specific ARM/Thumb disposition, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * the branch is resolved under the assumption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * that interworking is not required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) !(sym->st_value & 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) module->name, relindex, i, symname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) upper = __mem_to_opcode_thumb16(*(u16 *)loc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * 25 bit signed address range (Thumb-2 BL and B.W
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * instructions):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * S:I1:I2:imm10:imm11:0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * where:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * S = upper[10] = offset[24]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * I1 = ~(J1 ^ S) = offset[23]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * I2 = ~(J2 ^ S) = offset[22]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * imm10 = upper[9:0] = offset[21:12]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * imm11 = lower[10:0] = offset[11:1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * J1 = lower[13]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * J2 = lower[11]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) sign = (upper >> 10) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) j1 = (lower >> 13) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) j2 = (lower >> 11) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ((~(j2 ^ sign) & 1) << 22) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ((upper & 0x03ff) << 12) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ((lower & 0x07ff) << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (offset & 0x01000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) offset -= 0x02000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) offset += sym->st_value - loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * Route through a PLT entry if 'offset' exceeds the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * supported range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) (offset <= (s32)0xff000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) offset >= (s32)0x01000000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) offset = get_module_plt(module, loc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) offset + loc + 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) - loc - 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (offset <= (s32)0xff000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) offset >= (s32)0x01000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) module->name, relindex, i, symname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ELF32_R_TYPE(rel->r_info), loc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) sym->st_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) sign = (offset >> 24) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) j1 = sign ^ (~(offset >> 23) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) j2 = sign ^ (~(offset >> 22) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) upper = (u16)((upper & 0xf800) | (sign << 10) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ((offset >> 12) & 0x03ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) lower = (u16)((lower & 0xd000) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) (j1 << 13) | (j2 << 11) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ((offset >> 1) & 0x07ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) *(u16 *)loc = __opcode_to_mem_thumb16(upper);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) case R_ARM_THM_MOVW_ABS_NC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) case R_ARM_THM_MOVT_ABS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) upper = __mem_to_opcode_thumb16(*(u16 *)loc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * MOVT/MOVW instructions encoding in Thumb-2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * i = upper[10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * imm4 = upper[3:0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * imm3 = lower[14:12]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * imm8 = lower[7:0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * imm16 = imm4:i:imm3:imm8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) offset = ((upper & 0x000f) << 12) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ((upper & 0x0400) << 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ((lower & 0x7000) >> 4) | (lower & 0x00ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) offset = (offset ^ 0x8000) - 0x8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) offset += sym->st_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) offset >>= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) upper = (u16)((upper & 0xfbf0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) ((offset & 0xf000) >> 12) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ((offset & 0x0800) >> 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) lower = (u16)((lower & 0x8f00) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ((offset & 0x0700) << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) (offset & 0x00ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) *(u16 *)loc = __opcode_to_mem_thumb16(upper);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) pr_err("%s: unknown relocation: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) module->name, ELF32_R_TYPE(rel->r_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) struct mod_unwind_map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) const Elf_Shdr *unw_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) const Elf_Shdr *txt_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) const Elf_Shdr *sechdrs, const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) const Elf_Shdr *s, *se;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (strcmp(name, secstrs + s->sh_name) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) extern void fixup_pv_table(const void *, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) extern void fixup_smp(const void *, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct module *mod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) const Elf_Shdr *s = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #ifdef CONFIG_ARM_UNWIND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct mod_unwind_map maps[ARM_SEC_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) memset(maps, 0, sizeof(maps));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) for (s = sechdrs; s < sechdrs_end; s++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) const char *secname = secstrs + s->sh_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (!(s->sh_flags & SHF_ALLOC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (strcmp(".ARM.exidx.init.text", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) maps[ARM_SEC_INIT].unw_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) else if (strcmp(".ARM.exidx", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) maps[ARM_SEC_CORE].unw_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) else if (strcmp(".ARM.exidx.exit.text", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) maps[ARM_SEC_EXIT].unw_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) maps[ARM_SEC_UNLIKELY].unw_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) else if (strcmp(".ARM.exidx.text.hot", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) maps[ARM_SEC_HOT].unw_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) else if (strcmp(".init.text", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) maps[ARM_SEC_INIT].txt_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) else if (strcmp(".text", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) maps[ARM_SEC_CORE].txt_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) else if (strcmp(".exit.text", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) maps[ARM_SEC_EXIT].txt_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) else if (strcmp(".text.unlikely", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) maps[ARM_SEC_UNLIKELY].txt_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) else if (strcmp(".text.hot", secname) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) maps[ARM_SEC_HOT].txt_sec = s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) for (i = 0; i < ARM_SEC_MAX; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (maps[i].unw_sec && maps[i].txt_sec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) mod->arch.unwind[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) unwind_table_add(maps[i].unw_sec->sh_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) maps[i].unw_sec->sh_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) maps[i].txt_sec->sh_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) maps[i].txt_sec->sh_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #ifdef CONFIG_ARM_PATCH_PHYS_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) s = find_mod_section(hdr, sechdrs, ".pv_table");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) fixup_pv_table((void *)s->sh_addr, s->sh_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (s && !is_smp())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #ifdef CONFIG_SMP_ON_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) fixup_smp((void *)s->sh_addr, s->sh_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) module_arch_cleanup(struct module *mod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #ifdef CONFIG_ARM_UNWIND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) for (i = 0; i < ARM_SEC_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) unwind_table_del(mod->arch.unwind[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) mod->arch.unwind[i] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) void __weak module_arch_freeing_init(struct module *mod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #ifdef CONFIG_ARM_UNWIND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) unwind_table_del(mod->arch.unwind[ARM_SEC_INIT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) mod->arch.unwind[ARM_SEC_INIT] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }