^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/kernel/irq.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1992 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This file contains the code used by various IRQ handling routines:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * asking for different IRQ's should be done through these routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * instead of just grabbing them. Thus setups with different IRQ numbers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * shouldn't result in any weird surprises, and installing new handlers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * should be easier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * IRQ's are in fact implemented a bit like signal handlers for the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Naturally it's not a 1:1 relation, but there are similarities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/kallsyms.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/hardware/cache-l2x0.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/hardware/cache-uniphier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/outercache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/exception.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/mach/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned long irq_err_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int arch_show_interrupts(struct seq_file *p, int prec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #ifdef CONFIG_FIQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) show_fiq_list(p, prec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) show_ipi_list(p, prec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * handle_IRQ handles all hardware IRQ's. Decoded IRQs should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * not come via this function. Instead, they should provide their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * own 'handler'. Used by platform code implementing C-based 1st
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * level decoding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) void handle_IRQ(unsigned int irq, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) __handle_domain_irq(NULL, irq, false, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * asm_do_IRQ is the interface to be used from assembly code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) asmlinkage void __exception_irq_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) handle_IRQ(irq, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) void __init init_IRQ(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) irqchip_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) machine_desc->init_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!outer_cache.write_sec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) outer_cache.write_sec = machine_desc->l2c_write_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ret = l2x0_of_init(machine_desc->l2c_aux_val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) machine_desc->l2c_aux_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (ret && ret != -ENODEV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pr_err("L2C: failed to init: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) uniphier_cache_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #ifdef CONFIG_SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int __init arch_probe_nr_irqs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return nr_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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