Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  linux/arch/arm/kernel/debug.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 1994-1999 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *  32-bit debugging code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 		.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * Some debugging routines (useful if you've got MM problems and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * printk isn't working).  For DEBUGGING ONLY!!!  Do not leave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * references to these in a production kernel!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #if !defined(CONFIG_DEBUG_SEMIHOSTING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include CONFIG_DEBUG_LL_INCLUDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 		.macro	addruart_current, rx, tmp1, tmp2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		addruart	\tmp1, \tmp2, \rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		mrc		p15, 0, \rx, c1, c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		tst		\rx, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		moveq		\rx, \tmp1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		movne		\rx, \tmp2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #else /* !CONFIG_MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		.macro	addruart_current, rx, tmp1, tmp2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		addruart	\rx, \tmp1, \tmp2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #endif /* CONFIG_MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * Useful debugging routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) ENTRY(printhex8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		mov	r1, #8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		b	printhex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) ENDPROC(printhex8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) ENTRY(printhex4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		mov	r1, #4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		b	printhex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) ENDPROC(printhex4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) ENTRY(printhex2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		mov	r1, #2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) printhex:	adr	r2, hexbuf_rel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		ldr	r3, [r2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		add	r2, r2, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		add	r3, r2, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		mov	r1, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		strb	r1, [r3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 1:		and	r1, r0, #15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		mov	r0, r0, lsr #4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		cmp	r1, #10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		addlt	r1, r1, #'0'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		addge	r1, r1, #'a' - 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		strb	r1, [r3, #-1]!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		teq	r3, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		mov	r0, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		b	printascii
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) ENDPROC(printhex2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		.pushsection .bss
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) hexbuf_addr:	.space 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		.popsection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		.align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) hexbuf_rel:	.long	hexbuf_addr - .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		.ltorg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #ifndef CONFIG_DEBUG_SEMIHOSTING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) ENTRY(printascii)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		addruart_current r3, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 1:		teq	r0, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		ldrbne	r1, [r0], #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		teqne	r1, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		reteq	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 2:		teq     r1, #'\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		bne	3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		mov	r1, #'\r'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		waituartcts r2, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		waituarttxrdy r2, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		senduart r1, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		busyuart r2, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		mov	r1, #'\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		waituartcts r2, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		waituarttxrdy r2, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		senduart r1, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		busyuart r2, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		b	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ENDPROC(printascii)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ENTRY(printch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		addruart_current r3, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		mov	r1, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		mov	r0, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		b	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ENDPROC(printch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ENTRY(debug_ll_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		addruart r2, r3, ip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		str	r2, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		str	r3, [r1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		ret	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ENDPROC(debug_ll_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) ENTRY(printascii)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		mov	r1, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		mov	r0, #0x04		@ SYS_WRITE0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	ARM(	svc	#0x123456	)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #ifdef CONFIG_CPU_V7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	THUMB(	bkpt	#0xab		)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	THUMB(	svc	#0xab		)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		ret	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ENDPROC(printascii)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ENTRY(printch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		adr	r1, hexbuf_rel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		ldr	r2, [r1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		add	r1, r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		strb	r0, [r1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		mov	r0, #0x03		@ SYS_WRITEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	ARM(	svc	#0x123456	)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #ifdef CONFIG_CPU_V7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	THUMB(	bkpt	#0xab		)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	THUMB(	svc	#0xab		)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		ret	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ENDPROC(printch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ENTRY(debug_ll_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		mov	r2, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		str	r2, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		str	r2, [r1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		ret	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ENDPROC(debug_ll_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #endif