Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /* 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Debugging macro include header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *    Moved from arch/arm/mach-vt8500/include/mach/debug-macro.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *    Minor changes for readability.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define DEBUG_LL_PHYS_BASE		0xD8000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define DEBUG_LL_VIRT_BASE		0xF8000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define DEBUG_LL_UART_OFFSET		0x00200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #if defined(CONFIG_DEBUG_VT8500_UART0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	.macro	addruart, rp, rv, tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	mov	\rp,      #DEBUG_LL_UART_OFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	orr	\rv, \rp, #DEBUG_LL_VIRT_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	orr	\rp, \rp, #DEBUG_LL_PHYS_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	.macro	senduart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	strb	\rd, [\rx, #0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	.macro	busyuart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 1001:	ldr	\rd, [\rx, #0x1c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	ands	\rd, \rd, #0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	bne	1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	.macro	waituartcts,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	.macro	waituarttxrdy,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #endif