Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * arch/arm/include/debug/sti.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Debugging macro include header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define STIH41X_COMMS_BASE              0xfed00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define STIH41X_ASC2_BASE               (STIH41X_COMMS_BASE+0x32000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define STIH41X_SBC_LPM_BASE            0xfe400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define STIH41X_SBC_COMMS_BASE          (STIH41X_SBC_LPM_BASE + 0x100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define STIH41X_SBC_ASC1_BASE           (STIH41X_SBC_COMMS_BASE + 0x31000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define VIRT_ADDRESS(x)		(x - 0x1000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #if IS_ENABLED(CONFIG_STIH41X_DEBUG_ASC2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DEBUG_LL_UART_BASE	STIH41X_ASC2_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #if IS_ENABLED(CONFIG_STIH41X_DEBUG_SBC_ASC1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DEBUG_LL_UART_BASE	STIH41X_SBC_ASC1_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #ifndef DEBUG_LL_UART_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #error "DEBUG UART is not Configured"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define ASC_TX_BUF_OFF  0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define ASC_CTRL_OFF    0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ASC_STA_OFF     0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define ASC_STA_TX_FULL         (1<<9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ASC_STA_TX_EMPTY        (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		.macro	addruart, rp, rv, tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		ldr	\rp,      =DEBUG_LL_UART_BASE	@ physical base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		ldr	\rv,      =VIRT_ADDRESS(DEBUG_LL_UART_BASE) @ virt base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)                 .macro  senduart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)                 strb    \rd, [\rx, #ASC_TX_BUF_OFF]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)                 .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		.macro	waituartcts,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)                 .macro  waituarttxrdy,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 1001:           ldr     \rd, [\rx, #ASC_STA_OFF]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)                 tst     \rd, #ASC_STA_TX_FULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)                 bne     1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)                 .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)                 .macro  busyuart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 1001:           ldr     \rd, [\rx, #ASC_STA_OFF]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)                 tst     \rd, #ASC_STA_TX_EMPTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)                 beq     1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)                 .endm