Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /* arch/arm/include/debug/pl01x.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Debugging macro include header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  Copyright (C) 1994-1999 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/amba/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifdef CONFIG_DEBUG_ZTE_ZX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #undef UART01x_DR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #undef UART01x_FR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define UART01x_DR     0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define UART01x_FR     0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifdef CONFIG_DEBUG_UART_PHYS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		.macro	addruart, rp, rv, tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		ldr	\rp, =CONFIG_DEBUG_UART_PHYS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		ldr	\rv, =CONFIG_DEBUG_UART_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		.macro	senduart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		strb	\rd, [\rx, #UART01x_DR]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		.macro	waituartcts,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		.macro	waituarttxrdy,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 1001:		ldr	\rd, [\rx, #UART01x_FR]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  ARM_BE8(	rev	\rd, \rd )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		tst	\rd, #UART01x_FR_TXFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		bne	1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		.macro	busyuart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 1001:		ldr	\rd, [\rx, #UART01x_FR]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)  ARM_BE8(	rev	\rd, \rd )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		tst	\rd, #UART01x_FR_BUSY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		bne	1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		.endm