^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Debugging macro include header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1994-1999 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/serial_reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* External port on Zoom2/3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define ZOOM_UART_BASE 0x10000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define ZOOM_UART_VIRT 0xfa400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define OMAP_PORT_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ZOOM_PORT_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define UART_OFFSET(addr) ((addr) & 0x00ffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .pushsection .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .align 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) omap_uart_phys: .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) omap_uart_virt: .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) omap_uart_lsr: .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .popsection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .macro addruart, rp, rv, tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Use omap_uart_phys/virt if already configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 10: adr \rp, 99f @ get effective addr of 99f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ldr \rv, [\rp] @ get absolute addr of 99f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) sub \rv, \rv, \rp @ offset between the two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) sub \tmp, \rp, \rv @ make it effective
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ldr \rp, [\tmp, #0] @ omap_uart_phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ldr \rv, [\tmp, #4] @ omap_uart_virt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) cmp \rp, #0 @ is port configured?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) cmpne \rv, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) bne 100f @ already configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Configure the UART offset from the phys/virt base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #ifdef CONFIG_DEBUG_ZOOM_UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ldr \rp, =ZOOM_UART_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) str \rp, [\tmp, #0] @ omap_uart_phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ldr \rp, =ZOOM_UART_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) str \rp, [\tmp, #4] @ omap_uart_virt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) str \rp, [\tmp, #8] @ omap_uart_lsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) b 10b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 99: .word .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .word omap_uart_phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .ltorg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 100: /* Pass the UART_LSR reg address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ldr \tmp, [\tmp, #8] @ omap_uart_lsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) add \rp, \rp, \tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) add \rv, \rv, \tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .macro senduart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) bic \rx, \rx, #0xff @ get base (THR) reg address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) strb \rd, [\rx] @ send lower byte of rd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) bic \rd, \rd, #(0xff << 24) @ restore original rd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .macro busyuart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) bne 1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .macro waituartcts,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .macro waituarttxrdy,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .endm
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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