^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2014 Carlo Caione
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Carlo Caione <carlo@caione.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define MESON_AO_UART_WFIFO 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define MESON_AO_UART_STATUS 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define MESON_AO_UART_TX_FIFO_EMPTY (1 << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define MESON_AO_UART_TX_FIFO_FULL (1 << 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) .macro addruart, rp, rv, tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) ldr \rp, =(CONFIG_DEBUG_UART_PHYS) @ physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ldr \rv, =(CONFIG_DEBUG_UART_VIRT) @ virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .macro senduart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) str \rd, [\rx, #MESON_AO_UART_WFIFO]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .macro busyuart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 1002: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) tst \rd, #MESON_AO_UART_TX_FIFO_EMPTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) beq 1002b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .macro waituartcts,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .macro waituarttxrdy,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 1001: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) tst \rd, #MESON_AO_UART_TX_FIFO_FULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) bne 1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .endm