Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /* arch/arm/mach-footbridge/include/mach/debug-macro.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Debugging macro include header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  Copyright (C) 1994-1999 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/hardware/dec21285.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	/* For EBSA285 debugging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 		.equ	dc21285_high, ARMCSR_BASE & 0xff000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 		.equ	dc21285_low,  ARMCSR_BASE & 0x00ffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		.macro	addruart, rp, rv, tmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		.if	dc21285_low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		mov	\rp, #dc21285_low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		.else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		mov	\rp, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		orr	\rv, \rp, #dc21285_high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		orr	\rp, \rp, #0x42000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		.macro	senduart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		str	\rd, [\rx, #0x160]	@ UARTDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		.macro	busyuart,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 1001:		ldr	\rd, [\rx, #0x178]	@ UARTFLG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		tst	\rd, #1 << 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		bne	1001b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		.macro	waituartcts,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		.macro	waituarttxrdy,rd,rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		.endm