^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <asm-generic/vmlinux.lds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #ifdef CONFIG_HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define ARM_CPU_DISCARD(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define ARM_CPU_KEEP(x) x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define ARM_CPU_DISCARD(x) x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define ARM_CPU_KEEP(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) defined(CONFIG_GENERIC_BUG) || defined(CONFIG_JUMP_LABEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define ARM_EXIT_KEEP(x) x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define ARM_EXIT_DISCARD(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define ARM_EXIT_KEEP(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define ARM_EXIT_DISCARD(x) x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ARM_MMU_KEEP(x) x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define ARM_MMU_DISCARD(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ARM_MMU_KEEP(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ARM_MMU_DISCARD(x) x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * ld.lld does not support NOCROSSREFS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * https://github.com/ClangBuiltLinux/linux/issues/1609
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #ifdef CONFIG_LD_IS_LLD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define NOCROSSREFS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* Set start/end symbol names to the LMA for the section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ARM_LMA(sym, section) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) sym##_start = LOADADDR(section); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) sym##_end = LOADADDR(section) + SIZEOF(section)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PROC_INFO \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) . = ALIGN(4); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) __proc_info_begin = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *(.proc.info.init) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) __proc_info_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define IDMAP_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ALIGN_FUNCTION(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) __idmap_text_start = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *(.idmap.text) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __idmap_text_end = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define ARM_DISCARD \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *(.ARM.exidx.exit.text) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *(.ARM.extab.exit.text) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *(.ARM.exidx.text.exit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) *(.ARM.extab.text.exit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ARM_EXIT_DISCARD(EXIT_TEXT) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ARM_EXIT_DISCARD(EXIT_DATA) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) EXIT_CALL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ARM_MMU_DISCARD(*(.text.fixup)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ARM_MMU_DISCARD(*(__ex_table)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) COMMON_DISCARDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * Sections that should stay zero sized, which is safer to explicitly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * check instead of blindly discarding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define ARM_ASSERTS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .plt : { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) *(.iplt) *(.rel.iplt) *(.iplt) *(.igot.plt) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ASSERT(SIZEOF(.plt) == 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) "Unexpected run-time procedure linkages detected!")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define ARM_DETAILS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ELF_DETAILS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .ARM.attributes 0 : { *(.ARM.attributes) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define ARM_STUBS_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *(.gnu.warning) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) *(.glue_7) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *(.glue_7t) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) *(.vfp11_veneer) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *(.v4_bx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define ARM_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) IDMAP_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) __entry_text_start = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) *(.entry.text) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) __entry_text_end = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) IRQENTRY_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) SOFTIRQENTRY_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) TEXT_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) SCHED_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) CPUIDLE_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) LOCK_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) KPROBES_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ARM_STUBS_TEXT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) . = ALIGN(4); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) *(.got) /* Global offset table */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ARM_CPU_KEEP(PROC_INFO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Stack unwinding tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define ARM_UNWIND_SECTIONS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) . = ALIGN(8); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .ARM.unwind_idx : { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) __start_unwind_idx = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) *(.ARM.exidx*) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) __stop_unwind_idx = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .ARM.unwind_tab : { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) __start_unwind_tab = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) *(.ARM.extab*) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) __stop_unwind_tab = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * The vectors and stubs are relocatable code, and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * only thing that matters is their relative offsets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define ARM_VECTORS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) __vectors_lma = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .vectors { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) *(.vectors) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .vectors.bhb.loop8 { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) *(.vectors.bhb.loop8) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .vectors.bhb.bpiall { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) *(.vectors.bhb.bpiall) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ARM_LMA(__vectors, .vectors); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ARM_LMA(__vectors_bhb_loop8, .vectors.bhb.loop8); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ARM_LMA(__vectors_bhb_bpiall, .vectors.bhb.bpiall); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) . = __vectors_lma + SIZEOF(.vectors) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) SIZEOF(.vectors.bhb.loop8) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) SIZEOF(.vectors.bhb.bpiall); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) __stubs_lma = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .stubs ADDR(.vectors) + 0x1000 : AT(__stubs_lma) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) *(.stubs) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ARM_LMA(__stubs, .stubs); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) . = __stubs_lma + SIZEOF(.stubs); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PROVIDE(vector_fiq_offset = vector_fiq - ADDR(.vectors));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define ARM_TCM \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) __itcm_start = ALIGN(4); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .text_itcm ITCM_OFFSET : AT(__itcm_start - LOAD_OFFSET) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) __sitcm_text = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) *(.tcm.text) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) *(.tcm.rodata) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) . = ALIGN(4); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) __eitcm_text = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) . = __itcm_start + SIZEOF(.text_itcm); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) __dtcm_start = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .data_dtcm DTCM_OFFSET : AT(__dtcm_start - LOAD_OFFSET) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) __sdtcm_data = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) *(.tcm.data) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) . = ALIGN(4); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) __edtcm_data = .; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) . = __dtcm_start + SIZEOF(.data_dtcm);