Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2014 Renesas Electronics Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Initialization of CNTVOFF register from secure mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) ENTRY(secure_cntvoff_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	.arch	armv7-a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	 * CNTVOFF has to be initialized either from non-secure Hypervisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	 * mode or secure Monitor mode with SCR.NS==1. If TrustZone is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	 * then it should be handled by the secure code. The CPU must implement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	 * the virtualization extensions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	cps	#MON_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	mrc	p15, 0, r1, c1, c1, 0		/* Get Secure Config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	orr	r0, r1, #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	mcr	p15, 0, r0, c1, c1, 0		/* Set Non Secure bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	isb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	mov	r0, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	mcrr	p15, 4, r0, r0, c14		/* CNTVOFF = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	isb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	mcr	p15, 0, r1, c1, c1, 0		/* Set Secure bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	isb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	cps	#SVC_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	ret	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ENDPROC(secure_cntvoff_init)