^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/common/mcpm_head.S -- kernel entry point for multi-cluster PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Created by: Nicolas Pitre, March 2012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright: (C) 2012-2013 Linaro Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Refer to Documentation/arm/cluster-pm-race-avoidance.rst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * for details of the synchronisation algorithms used here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mcpm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "vlock.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .if MCPM_SYNC_CLUSTER_CPUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .error "cpus must be the first member of struct mcpm_sync_struct"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .macro pr_dbg string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #if defined(CONFIG_DEBUG_LL) && defined(DEBUG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) b 1901f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 1902: .asciz "CPU"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 1903: .asciz " cluster"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 1904: .asciz ": \string"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 1901: adr r0, 1902b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) bl printascii
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) mov r0, r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) bl printhex2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) adr r0, 1903b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) bl printascii
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mov r0, r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) bl printhex2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) adr r0, 1904b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) bl printascii
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .arm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ENTRY(mcpm_entry_point)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ARM_BE8(setend be)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) THUMB( badr r12, 1f )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) THUMB( bx r12 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) THUMB( .thumb )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mrc p15, 0, r0, c0, c0, 5 @ MPIDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ubfx r9, r0, #0, #8 @ r9 = cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ubfx r10, r0, #8, #8 @ r10 = cluster
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) mov r3, #MAX_CPUS_PER_CLUSTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mla r4, r3, r10, r9 @ r4 = canonical CPU index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) cmp r4, #(MAX_CPUS_PER_CLUSTER * MAX_NR_CLUSTERS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) blo 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* We didn't expect this CPU. Try to cheaply make it quiet. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 1: wfi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) wfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) b 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 2: pr_dbg "kernel mcpm_entry_point\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * MMU is off so we need to get to various variables in a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * position independent way.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) adr r5, 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ldmia r5, {r0, r6, r7, r8, r11}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) add r0, r5, r0 @ r0 = mcpm_entry_early_pokes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) add r6, r5, r6 @ r6 = mcpm_entry_vectors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ldr r7, [r5, r7] @ r7 = mcpm_power_up_setup_phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) add r8, r5, r8 @ r8 = mcpm_sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) add r11, r5, r11 @ r11 = first_man_locks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) @ Perform an early poke, if any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) add r0, r0, r4, lsl #3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ldmia r0, {r0, r1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) teq r0, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) strne r1, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) mov r0, #MCPM_SYNC_CLUSTER_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) mla r8, r0, r10, r8 @ r8 = sync cluster base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) @ Signal that this CPU is coming UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) mov r0, #CPU_COMING_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) mov r5, #MCPM_SYNC_CPU_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) mla r5, r9, r5, r8 @ r5 = sync cpu address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) strb r0, [r5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) @ At this point, the cluster cannot unexpectedly enter the GOING_DOWN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) @ state, because there is at least one active CPU (this CPU).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) mov r0, #VLOCK_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) mla r11, r0, r10, r11 @ r11 = cluster first man lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) mov r0, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) mov r1, r9 @ cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) bl vlock_trylock @ implies DMB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) cmp r0, #0 @ failed to get the lock?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) bne mcpm_setup_wait @ wait for cluster setup if so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ldrb r0, [r8, #MCPM_SYNC_CLUSTER_CLUSTER]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) cmp r0, #CLUSTER_UP @ cluster already up?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) bne mcpm_setup @ if not, set up the cluster
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) @ Otherwise, release the first man lock and skip setup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) mov r0, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) bl vlock_unlock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) b mcpm_setup_complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) mcpm_setup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) @ Control dependency implies strb not observable before previous ldrb.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) @ Signal that the cluster is being brought up:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) mov r0, #INBOUND_COMING_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) strb r0, [r8, #MCPM_SYNC_CLUSTER_INBOUND]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dmb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) @ Any CPU trying to take the cluster into CLUSTER_GOING_DOWN from this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) @ point onwards will observe INBOUND_COMING_UP and abort.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) @ Wait for any previously-pending cluster teardown operations to abort
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) @ or complete:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) mcpm_teardown_wait:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ldrb r0, [r8, #MCPM_SYNC_CLUSTER_CLUSTER]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) cmp r0, #CLUSTER_GOING_DOWN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) bne first_man_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) wfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) b mcpm_teardown_wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) first_man_setup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dmb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) @ If the outbound gave up before teardown started, skip cluster setup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) cmp r0, #CLUSTER_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) beq mcpm_setup_leave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) @ power_up_setup is now responsible for setting up the cluster:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) cmp r7, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) mov r0, #1 @ second (cluster) affinity level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) blxne r7 @ Call power_up_setup if defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) dmb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) mov r0, #CLUSTER_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) strb r0, [r8, #MCPM_SYNC_CLUSTER_CLUSTER]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) dmb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) mcpm_setup_leave:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) @ Leave the cluster setup critical section:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) mov r0, #INBOUND_NOT_COMING_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) strb r0, [r8, #MCPM_SYNC_CLUSTER_INBOUND]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) dsb st
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) sev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) mov r0, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) bl vlock_unlock @ implies DMB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) b mcpm_setup_complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) @ In the contended case, non-first men wait here for cluster setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) @ to complete:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) mcpm_setup_wait:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ldrb r0, [r8, #MCPM_SYNC_CLUSTER_CLUSTER]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) cmp r0, #CLUSTER_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) wfene
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) bne mcpm_setup_wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dmb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) mcpm_setup_complete:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) @ If a platform-specific CPU setup hook is needed, it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) @ called from here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) cmp r7, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) mov r0, #0 @ first (CPU) affinity level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) blxne r7 @ Call power_up_setup if defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) dmb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) @ Mark the CPU as up:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) mov r0, #CPU_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) strb r0, [r5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) @ Observability order of CPU_UP and opening of the gate does not matter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) mcpm_entry_gated:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) ldr r5, [r6, r4, lsl #2] @ r5 = CPU entry vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) cmp r5, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) wfeeq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) beq mcpm_entry_gated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) dmb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) pr_dbg "released\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) bx r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .align 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 3: .word mcpm_entry_early_pokes - .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .word mcpm_entry_vectors - 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .word mcpm_power_up_setup_phys - 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .word mcpm_sync - 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .word first_man_locks - 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ENDPROC(mcpm_entry_point)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .bss
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .align CACHE_WRITEBACK_ORDER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .type first_man_locks, #object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) first_man_locks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .space VLOCK_SIZE * MAX_NR_CLUSTERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .align CACHE_WRITEBACK_ORDER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .type mcpm_entry_vectors, #object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ENTRY(mcpm_entry_vectors)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .space 4 * MAX_NR_CLUSTERS * MAX_CPUS_PER_CLUSTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .type mcpm_entry_early_pokes, #object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ENTRY(mcpm_entry_early_pokes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .space 8 * MAX_NR_CLUSTERS * MAX_CPUS_PER_CLUSTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .type mcpm_power_up_setup_phys, #object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ENTRY(mcpm_power_up_setup_phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .space 4 @ set by mcpm_sync_init()
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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