^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) config ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) select ARCH_32BIT_OFF_T
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) select ARCH_HAS_BINFMT_FLAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) select ARCH_HAS_DEBUG_VIRTUAL if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) select ARCH_HAS_DEVMEM_IS_ALLOWED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) select ARCH_HAS_DMA_WRITE_COMBINE if !ARM_DMA_MEM_BUFFERABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) select ARCH_HAS_ELF_RANDOMIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) select ARCH_HAS_FORTIFY_SOURCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) select ARCH_HAS_KEEPINITRD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) select ARCH_HAS_KCOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) select ARCH_HAS_MEMBARRIER_SYNC_CORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) select ARCH_HAS_PTE_SPECIAL if ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) select ARCH_HAS_PHYS_TO_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) select ARCH_HAS_SETUP_DMA_OPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) select ARCH_HAS_SET_MEMORY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) select ARCH_HAS_STRICT_MODULE_RWX if MMU && (!ROCKCHIP_MINI_KERNEL || STRICT_KERNEL_RWX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) select ARCH_HAS_SYNC_DMA_FOR_DEVICE if SWIOTLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) select ARCH_HAS_SYNC_DMA_FOR_CPU if SWIOTLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) select ARCH_HAS_TEARDOWN_DMA_OPS if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) select ARCH_HAVE_CUSTOM_GPIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) select ARCH_HAS_GCOV_PROFILE_ALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) select ARCH_KEEP_MEMBLOCK if HAVE_ARCH_PFN_VALID || KEXEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) select ARCH_MIGHT_HAVE_PC_PARPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) select ARCH_NO_SG_CHAIN if !ARM_HAS_SG_CHAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) select ARCH_SUPPORTS_ATOMIC_RMW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) select ARCH_USE_BUILTIN_BSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) select ARCH_USE_CMPXCHG_LOCKREF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) select ARCH_WANT_IPC_PARSE_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) select ARCH_WANT_LD_ORPHAN_WARN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) select BINFMT_FLAT_ARGVP_ENVP_ON_STACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) select BUILDTIME_TABLE_SORT if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) select CLONE_BACKWARDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) select CPU_PM if SUSPEND || CPU_IDLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) select DMA_DECLARE_COHERENT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) select DMA_OPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) select DMA_REMAP if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) select EDAC_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) select EDAC_ATOMIC_SCRUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) select GENERIC_ALLOCATOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) select GENERIC_ARCH_TOPOLOGY if ARM_CPU_TOPOLOGY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) select GENERIC_ATOMIC64 if CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) select GENERIC_CLOCKEVENTS_BROADCAST if SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) select GENERIC_IRQ_IPI if SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) select ARCH_WANTS_IRQ_RAW if GENERIC_IRQ_IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) select GENERIC_CPU_AUTOPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) select GENERIC_EARLY_IOREMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) select GENERIC_IDLE_POLL_SETUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) select GENERIC_IRQ_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) select GENERIC_IRQ_SHOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) select GENERIC_IRQ_SHOW_LEVEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) select GENERIC_PCI_IOMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) select GENERIC_SCHED_CLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) select GENERIC_SMP_IDLE_THREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) select GENERIC_STRNCPY_FROM_USER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) select GENERIC_STRNLEN_USER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) select HANDLE_DOMAIN_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) select HARDIRQS_SW_RESEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) select HAVE_ARCH_MMAP_RND_BITS if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) select HAVE_ARCH_SECCOMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) select HAVE_ARCH_THREAD_STRUCT_WHITELIST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) select HAVE_ARCH_TRACEHOOK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) select HAVE_ARM_SMCCC if CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) select HAVE_CONTEXT_TRACKING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) select HAVE_C_RECORDMCOUNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) select HAVE_DMA_CONTIGUOUS if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) select HAVE_EXIT_THREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) select HAVE_FAST_GUP if ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) select HAVE_FUNCTION_TRACER if !XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) select HAVE_FUTEX_CMPXCHG if FUTEX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) select HAVE_GCC_PLUGINS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) select HAVE_IDE if PCI || ISA || PCMCIA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) select HAVE_IRQ_TIME_ACCOUNTING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) select HAVE_KERNEL_GZIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) select HAVE_KERNEL_LZ4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) select HAVE_KERNEL_LZMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) select HAVE_KERNEL_LZO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) select HAVE_KERNEL_XZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) select HAVE_KRETPROBES if HAVE_KPROBES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) select HAVE_MOD_ARCH_SPECIFIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) select HAVE_NMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) select HAVE_OPROFILE if HAVE_PERF_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) select HAVE_OPTPROBES if !THUMB2_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) select HAVE_PERF_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) select HAVE_PERF_REGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) select HAVE_PERF_USER_STACK_DUMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) select HAVE_REGS_AND_STACK_ACCESS_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) select HAVE_RSEQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) select HAVE_STACKPROTECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) select HAVE_SYSCALL_TRACEPOINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) select HAVE_UID16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) select HAVE_VIRT_CPU_ACCOUNTING_GEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) select IRQ_FORCED_THREADING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) select MODULES_USE_ELF_REL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) select NEED_DMA_MAP_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) select OF_EARLY_FLATTREE if OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) select OLD_SIGACTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) select OLD_SIGSUSPEND3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) select PCI_SYSCALL if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) select PERF_USE_VMALLOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) select RTC_LIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) select SET_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) select SYS_SUPPORTS_APM_EMULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) # Above selects are sorted alphabetically; please add new ones
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) # according to that. Thanks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) The ARM series is a line of low-power-consumption RISC chip designs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) licensed by ARM Ltd and targeted at embedded applications and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) manufactured, but legacy ARM-based PC hardware remains popular in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) Europe. There is an ARM Linux project with a web page at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) <http://www.arm.linux.org.uk/>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) config ARM_HAS_SG_CHAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) config ARM_DMA_USE_IOMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) select ARM_HAS_SG_CHAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) select NEED_SG_DMA_LENGTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if ARM_DMA_USE_IOMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) config ARM_DMA_IOMMU_ALIGNMENT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) range 4 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) default 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) DMA mapping framework by default aligns all buffers to the smallest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PAGE_SIZE order which is greater than or equal to the requested buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) size. This works well for buffers up to a few hundreds kilobytes, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) for larger buffers it just a waste of address space. Drivers which has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) relatively small addressing window (like 64Mib) might run out of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) virtual space with just a few allocations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) With this parameter you can specify the maximum PAGE_SIZE order for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DMA IOMMU buffers. Larger buffers will be aligned only to this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) specified order. The order is expressed as a power of two multiplied
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) by the PAGE_SIZE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) config SYS_SUPPORTS_APM_EMULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) config HAVE_TCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) select GENERIC_ALLOCATOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) config HAVE_PROC_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) config NO_IOPORT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) config SBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) config STACKTRACE_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) config LOCKDEP_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) config TRACE_IRQFLAGS_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) default !CPU_V7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) config ARCH_HAS_ILOG2_U32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) config ARCH_HAS_ILOG2_U64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) config ARCH_HAS_BANDGAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) config FIX_EARLYCON_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) def_bool y if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) config GENERIC_HWEIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) config GENERIC_CALIBRATE_DELAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) config ARCH_MAY_HAVE_PC_FDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) config ZONE_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) config ARCH_SUPPORTS_UPROBES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) config ARCH_HAS_DMA_SET_COHERENT_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) config GENERIC_ISA_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) config FIQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) config NEED_RET_TO_USER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) config ARCH_MTD_XIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) config ARM_PATCH_PHYS_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) bool "Patch physical to virtual translations at runtime" if EMBEDDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) depends on !XIP_KERNEL && MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) Patch phys-to-virt and virt-to-phys translation functions at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) boot and module load time according to the position of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) kernel in system memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) This can only be used with non-XIP MMU kernels where the base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) of physical memory is at a 16MB boundary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) Only disable this option if you know that you do not require
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) this feature (eg, building a kernel for a single machine) and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) you need to shrink the kernel to the minimal size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) config NEED_MACH_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) Select this when mach/io.h is required to provide special
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) definitions for this platform. The need for mach/io.h should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) be avoided when possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) config NEED_MACH_MEMORY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) Select this when mach/memory.h is required to provide special
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) definitions for this platform. The need for mach/memory.h should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) be avoided when possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) config PHYS_OFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) hex "Physical address of main memory" if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) depends on !ARM_PATCH_PHYS_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) default DRAM_BASE if !MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) default 0x00000000 if ARCH_EBSA110 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ARCH_FOOTBRIDGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) default 0x20000000 if ARCH_S5PV210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) default 0xc0000000 if ARCH_SA1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) Please provide the physical address corresponding to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) location of main memory in your system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) config GENERIC_BUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) depends on BUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) config PGTABLE_LEVELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) default 3 if ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) default 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) menu "System Type"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) config MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) bool "MMU-based Paged Memory Management Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) Select if you want MMU-based virtualised addressing space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) support by paged memory management. If unsure, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) config ARCH_MMAP_RND_BITS_MIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) default 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) config ARCH_MMAP_RND_BITS_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) default 14 if PAGE_OFFSET=0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) default 15 if PAGE_OFFSET=0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) default 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) # The "ARM system type" choice list is ordered alphabetically by option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) # text. Please add new entries in the option alphabetic order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) prompt "ARM system type"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) default ARM_SINGLE_ARMV7M if !MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) default ARCH_MULTIPLATFORM if MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) config ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) bool "Allow multiple platforms to be selected"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) select ARCH_FLATMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) select ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) select ARCH_SELECT_MEMORY_MODEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) select ARM_HAS_SG_CHAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) select ARM_PATCH_PHYS_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) select AUTO_ZRELADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) select TIMER_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) select COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) select PCI_DOMAINS_GENERIC if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) select USE_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) config ARM_SINGLE_ARMV7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) depends on !MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) select ARM_NVIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) select AUTO_ZRELADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) select TIMER_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) select COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) select CPU_V7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) select NO_IOPORT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) select USE_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) config ARCH_EBSA110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) bool "EBSA-110"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) select ARCH_USES_GETTIMEOFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) select CPU_SA110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) select ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) select NEED_MACH_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) select NEED_MACH_MEMORY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) select NO_IOPORT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) This is an evaluation board for the StrongARM processor available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) from Digital. It has limited hardware on-board, including an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) Ethernet interface, two PCMCIA sockets, two serial ports and a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) parallel port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) config ARCH_EP93XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) bool "EP93xx-based"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) select ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) select ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) imply ARM_PATCH_PHYS_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) select ARM_VIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) select AUTO_ZRELADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) select CLKDEV_LOOKUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) select CLKSRC_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) select CPU_ARM920T
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) select HAVE_LEGACY_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) This enables support for the Cirrus EP93xx series of CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) config ARCH_FOOTBRIDGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) bool "FootBridge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) select CPU_SA110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) select FOOTBRIDGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) select HAVE_IDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) select NEED_MACH_IO_H if !MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) select NEED_MACH_MEMORY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) Support for systems based on the DC21285 companion chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) config ARCH_IOP32X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) bool "IOP32x-based"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) select CPU_XSCALE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) select GPIO_IOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) select NEED_RET_TO_USER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) select FORCE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) select PLAT_IOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) Support for Intel's 80219 and IOP32X (XScale) family of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) config ARCH_IXP4XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) bool "IXP4xx-based"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) select ARCH_HAS_DMA_SET_COHERENT_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) select ARCH_SUPPORTS_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) select CPU_XSCALE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) select DMABOUNCE if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) select GPIO_IXP4XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) select IXP4XX_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) select IXP4XX_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) select NEED_MACH_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) select USB_EHCI_BIG_ENDIAN_DESC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) select USB_EHCI_BIG_ENDIAN_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) Support for Intel's IXP4XX (XScale) family of processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) config ARCH_DOVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) bool "Marvell Dove"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) select CPU_PJ4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) select MVEBU_MBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) select PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) select PINCTRL_DOVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) select PLAT_ORION_LEGACY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) select PM_GENERIC_DOMAINS if PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) Support for the Marvell Dove SoC 88AP510
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) config ARCH_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) bool "PXA2xx/PXA3xx-based"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) select ARCH_MTD_XIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) select ARM_CPU_SUSPEND if PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) select AUTO_ZRELADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) select COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) select CLKSRC_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) select CLKSRC_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) select TIMER_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) select CPU_XSCALE if !CPU_XSC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) select GPIO_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) select HAVE_IDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) select PLAT_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) config ARCH_RPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) bool "RiscPC"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) select ARCH_ACORN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) select ARCH_MAY_HAVE_PC_FDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) select ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) select ARM_HAS_SG_CHAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) select CPU_SA110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) select FIQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) select HAVE_IDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) select HAVE_PATA_PLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) select ISA_DMA_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) select NEED_MACH_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) select NEED_MACH_MEMORY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) select NO_IOPORT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) On the Acorn Risc-PC, Linux can support the internal IDE disk and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) CD-ROM interface, serial and parallel port, and the floppy drive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) config ARCH_SA1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) bool "SA1100-based"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) select ARCH_MTD_XIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) select ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) select CLKSRC_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) select CLKSRC_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) select TIMER_OF if OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) select COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) select CPU_FREQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) select CPU_SA1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) select HAVE_IDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) select ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) select NEED_MACH_MEMORY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) Support for StrongARM 11x0 based boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) config ARCH_S3C24XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) bool "Samsung S3C24XX SoCs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) select ATAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) select CLKSRC_SAMSUNG_PWM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) select GPIO_SAMSUNG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) select HAVE_S3C2410_I2C if I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) select HAVE_S3C_RTC if RTC_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) select NEED_MACH_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) select S3C2410_WATCHDOG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) select SAMSUNG_ATAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) select USE_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) select WATCHDOG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) Samsung SMDK2410 development board (and derivatives).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) config ARCH_OMAP1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) bool "TI OMAP1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) select ARCH_HAS_HOLES_MEMORYMODEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) select ARCH_OMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) select CLKDEV_LOOKUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) select CLKSRC_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) select HAVE_IDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) select HAVE_LEGACY_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) select NEED_MACH_IO_H if PCCARD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) select NEED_MACH_MEMORY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) menu "Multiple platform selection"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) depends on ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) comment "CPU Core family selection"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) config ARCH_MULTI_V4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) bool "ARMv4 based platforms (FA526)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) depends on !ARCH_MULTI_V6_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) select ARCH_MULTI_V4_V5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) select CPU_FA526
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) config ARCH_MULTI_V4T
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) depends on !ARCH_MULTI_V6_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) select ARCH_MULTI_V4_V5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) CPU_ARM925T || CPU_ARM940T)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) config ARCH_MULTI_V5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) depends on !ARCH_MULTI_V6_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) select ARCH_MULTI_V4_V5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) config ARCH_MULTI_V4_V5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) config ARCH_MULTI_V6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) bool "ARMv6 based platforms (ARM11)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) select ARCH_MULTI_V6_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) select CPU_V6K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) config ARCH_MULTI_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) select ARCH_MULTI_V6_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) select CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) select HAVE_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) config ARCH_MULTI_V6_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) select MIGHT_HAVE_CACHE_L2X0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) config ARCH_MULTI_CPU_AUTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) select ARCH_MULTI_V5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) config ARCH_VIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) bool "Dummy Virtual Machine"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) depends on ARCH_MULTI_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) select ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) select ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) select ARM_GIC_V2M if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) select ARM_GIC_V3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) select ARM_GIC_V3_ITS if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) select ARM_PSCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) select HAVE_ARM_ARCH_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) select ARCH_SUPPORTS_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) # This is sorted alphabetically by mach-* pathname. However, plat-*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) # Kconfigs may be included either alphabetically (according to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) # plat- suffix) or along side the corresponding mach-* source.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) source "arch/arm/mach-actions/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) source "arch/arm/mach-alpine/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) source "arch/arm/mach-artpec/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) source "arch/arm/mach-asm9260/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) source "arch/arm/mach-aspeed/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) source "arch/arm/mach-at91/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) source "arch/arm/mach-axxia/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) source "arch/arm/mach-bcm/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) source "arch/arm/mach-berlin/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) source "arch/arm/mach-clps711x/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) source "arch/arm/mach-cns3xxx/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) source "arch/arm/mach-davinci/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) source "arch/arm/mach-digicolor/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) source "arch/arm/mach-dove/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) source "arch/arm/mach-ep93xx/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) source "arch/arm/mach-exynos/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) source "arch/arm/mach-footbridge/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) source "arch/arm/mach-gemini/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) source "arch/arm/mach-highbank/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) source "arch/arm/mach-hisi/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) source "arch/arm/mach-imx/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) source "arch/arm/mach-integrator/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) source "arch/arm/mach-iop32x/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) source "arch/arm/mach-ixp4xx/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) source "arch/arm/mach-keystone/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) source "arch/arm/mach-lpc32xx/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) source "arch/arm/mach-mediatek/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) source "arch/arm/mach-meson/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) source "arch/arm/mach-milbeaut/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) source "arch/arm/mach-mmp/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) source "arch/arm/mach-moxart/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) source "arch/arm/mach-mstar/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) source "arch/arm/mach-mv78xx0/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) source "arch/arm/mach-mvebu/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) source "arch/arm/mach-mxs/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) source "arch/arm/mach-nomadik/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) source "arch/arm/mach-npcm/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) source "arch/arm/mach-nspire/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) source "arch/arm/plat-omap/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) source "arch/arm/mach-omap1/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) source "arch/arm/mach-omap2/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) source "arch/arm/mach-orion5x/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) source "arch/arm/mach-oxnas/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) source "arch/arm/mach-picoxcell/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) source "arch/arm/mach-prima2/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) source "arch/arm/mach-pxa/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) source "arch/arm/plat-pxa/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) source "arch/arm/mach-qcom/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) source "arch/arm/mach-rda/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) source "arch/arm/mach-realtek/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) source "arch/arm/mach-realview/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) source "arch/arm/mach-rockchip/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) source "arch/arm/mach-s3c/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) source "arch/arm/mach-s5pv210/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) source "arch/arm/mach-sa1100/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) source "arch/arm/mach-shmobile/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) source "arch/arm/mach-socfpga/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) source "arch/arm/mach-spear/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) source "arch/arm/mach-sti/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) source "arch/arm/mach-stm32/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) source "arch/arm/mach-sunxi/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) source "arch/arm/mach-tango/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) source "arch/arm/mach-tegra/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) source "arch/arm/mach-u300/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) source "arch/arm/mach-uniphier/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) source "arch/arm/mach-ux500/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) source "arch/arm/mach-versatile/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) source "arch/arm/mach-vexpress/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) source "arch/arm/mach-vt8500/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) source "arch/arm/mach-zx/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) source "arch/arm/mach-zynq/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) # ARMv7-M architecture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) config ARCH_EFM32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) bool "Energy Micro efm32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) depends on ARM_SINGLE_ARMV7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) config ARCH_LPC18XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) bool "NXP LPC18xx/LPC43xx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) depends on ARM_SINGLE_ARMV7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) select ARCH_HAS_RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) select ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) select CLKSRC_LPC32XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) select PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) high performance microcontrollers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) config ARCH_MPS2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) bool "ARM MPS2 platform"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) depends on ARM_SINGLE_ARMV7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) select ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) select CLKSRC_MPS2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) Support for Cortex-M Prototyping System (or V2M-MPS2) which comes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) with a range of available cores like Cortex-M3/M4/M7.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) Please, note that depends which Application Note is used memory map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) for the platform may vary, so adjustment of RAM base might be needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) # Definitions to make life easier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) config ARCH_ACORN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) config PLAT_IOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) config PLAT_ORION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) select CLKSRC_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) select COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) config PLAT_ORION_LEGACY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) select PLAT_ORION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) config PLAT_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) config PLAT_VERSATILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) source "arch/arm/mm/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) config IWMMXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) bool "Enable iWMMXt support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) Enable support for iWMMXt context switching at run time if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) running on a CPU that supports it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if !MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) source "arch/arm/Kconfig-nommu"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) config PJ4B_ERRATA_4742
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) depends on CPU_PJ4B && MACH_ARMADA_370
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) When coming out of either a Wait for Interrupt (WFI) or a Wait for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) Event (WFE) IDLE states, a specific timing sensitivity exists between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) the retiring WFI/WFE instructions and the newly issued subsequent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) instructions. This sensitivity can result in a CPU hang scenario.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) Workaround:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) The software must insert either a Data Synchronization Barrier (DSB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) or Data Memory Barrier (DMB) command immediately after the WFI/WFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) config ARM_ERRATA_326103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) depends on CPU_V6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) Executing a SWP instruction to read-only memory does not set bit 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) treat the access as a read, preventing a COW from occurring and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) causing the faulting task to livelock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) config ARM_ERRATA_411920
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) depends on CPU_V6 || CPU_V6K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) Invalidation of the Instruction Cache operation can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) It does not affect the MPCore. This option enables the ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) recommended workaround.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) config ARM_ERRATA_430973
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) bool "ARM errata: Stale prediction on replaced interworking branch"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) This option enables the workaround for the 430973 Cortex-A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) r1p* erratum. If a code sequence containing an ARM/Thumb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) interworking branch is replaced with another code sequence at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) same virtual address, whether due to self-modifying code or virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) to physical address re-mapping, Cortex-A8 does not recover from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) stale interworking branch prediction. This results in Cortex-A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) executing the new code sequence in the incorrect ARM or Thumb state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) and also flushes the branch target cache at every context switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) Note that setting specific bits in the ACTLR register may not be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) available in non-secure mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) config ARM_ERRATA_458693
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) bool "ARM errata: Processor deadlock when a false hazard is created"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) depends on !ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) This option enables the workaround for the 458693 Cortex-A8 (r2p0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) erratum. For very specific sequences of memory operations, it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) possible for a hazard condition intended for a cache line to instead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) be incorrectly associated with a different cache line. This false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) hazard might then cause a processor deadlock. The workaround enables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) the L1 caching of the NEON accesses and disables the PLD instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) in the ACTLR register. Note that setting specific bits in the ACTLR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) register may not be available in non-secure mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) config ARM_ERRATA_460075
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) depends on !ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) This option enables the workaround for the 460075 Cortex-A8 (r2p0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) erratum. Any asynchronous access to the L2 cache may encounter a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) situation in which recent store transactions to the L2 cache are lost
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) and overwritten with stale memory contents from external memory. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) workaround disables the write-allocate mode for the L2 cache via the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) ACTLR register. Note that setting specific bits in the ACTLR register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) may not be available in non-secure mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) config ARM_ERRATA_742230
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) bool "ARM errata: DMB operation may be faulty"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) depends on !ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) This option enables the workaround for the 742230 Cortex-A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) between two write operations may not ensure the correct visibility
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) ordering of the two writes. This workaround sets a specific bit in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) the diagnostic register of the Cortex-A9 which causes the DMB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) instruction to behave as a DSB, ensuring the correct behaviour of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) the two writes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) config ARM_ERRATA_742231
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) depends on !ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) This option enables the workaround for the 742231 Cortex-A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) (r2p0..r2p2) erratum. Under certain conditions, specific to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) accessing some data located in the same cache line, may get corrupted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) data due to bad handling of the address hazard when the line gets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) replaced from one of the CPUs at the same time as another CPU is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) accessing it. This workaround sets specific bits in the diagnostic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) register of the Cortex-A9 which reduces the linefill issuing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) capabilities of the processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) config ARM_ERRATA_643719
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) This option enables the workaround for the 643719 Cortex-A9 (prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) register returns zero when it should return one. The workaround
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) corrects this value, ensuring cache maintenance operations which use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) it behave as intended and avoiding data corruption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) config ARM_ERRATA_720789
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) This option enables the workaround for the 720789 Cortex-A9 (prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) As a consequence of this erratum, some TLB entries which should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) invalidated are not, resulting in an incoherency in the system page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) tables. The workaround changes the TLB flushing routines to invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) entries regardless of the ASID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) config ARM_ERRATA_743622
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) depends on !ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) This option enables the workaround for the 743622 Cortex-A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) (r2p*) erratum. Under very rare conditions, a faulty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) optimisation in the Cortex-A9 Store Buffer may lead to data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) corruption. This workaround sets a specific bit in the diagnostic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) register of the Cortex-A9 which disables the Store Buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) optimisation, preventing the defect from occurring. This has no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) visible impact on the overall performance or power consumption of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) config ARM_ERRATA_751472
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) depends on !ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) This option enables the workaround for the 751472 Cortex-A9 (prior
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) completion of a following broadcasted operation if the second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) operation is received by a CPU before the ICIALLUIS has completed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) potentially leading to corrupted entries in the cache or TLB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) config ARM_ERRATA_754322
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) bool "ARM errata: possible faulty MMU translations following an ASID switch"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) This option enables the workaround for the 754322 Cortex-A9 (r2p*,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) r3p*) erratum. A speculative memory access may cause a page table walk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) which starts prior to an ASID switch but completes afterwards. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) can populate the micro-TLB with a stale entry which may be hit with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) the new ASID. This workaround places two dsb instructions in the mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) switching code so that no page table walks can cross the ASID switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) config ARM_ERRATA_754327
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) bool "ARM errata: no automatic Store Buffer drain"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) This option enables the workaround for the 754327 Cortex-A9 (prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) r2p0) erratum. The Store Buffer does not have any automatic draining
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) mechanism and therefore a livelock may occur if an external agent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) continuously polls a memory location waiting to observe an update.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) This workaround defines cpu_relax() as smp_mb(), preventing correctly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) written polling loops from denying visibility of updates to memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) config ARM_ERRATA_364296
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) depends on CPU_V6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) This options enables the workaround for the 364296 ARM1136
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) r0p2 erratum (possible cache data corruption with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) hit-under-miss enabled). It sets the undocumented bit 31 in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) the auxiliary control register and the FI bit in the control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) register, thus disabling hit-under-miss without putting the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) processor into full low interrupt latency mode. ARM11MPCore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) is not affected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) config ARM_ERRATA_764369
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) This option enables the workaround for erratum 764369
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) affecting Cortex-A9 MPCore with two or more processors (all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) current revisions). Under certain timing circumstances, a data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) cache line maintenance operation by MVA targeting an Inner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) Shareable memory region may fail to proceed up to either the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) Point of Coherency or to the Point of Unification of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) system. This workaround adds a DSB instruction before the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) relevant cache maintenance functions and sets a specific bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) in the diagnostic control register of the SCU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) config ARM_ERRATA_775420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) This option enables the workaround for the 775420 Cortex-A9 (r2p2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) r2p6,r2p8,r2p10,r3p0) erratum. In case a data cache maintenance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) operation aborts with MMU exception, it might cause the processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) to deadlock. This workaround puts DSB before executing ISB if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) an abort may occur on cache maintenance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) config ARM_ERRATA_798181
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) bool "ARM errata: TLBI/DSB failure on Cortex-A15"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) adequately shooting down all use of the old entries. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) option enables the Linux kernel workaround for this erratum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) which sends an IPI to the CPUs that are running the same ASID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) as the one being invalidated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) config ARM_ERRATA_773022
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) bool "ARM errata: incorrect instructions may be executed from loop buffer"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) This option enables the workaround for the 773022 Cortex-A15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) (up to r0p4) erratum. In certain rare sequences of code, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) loop buffer may deliver incorrect instructions. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) workaround disables the loop buffer to avoid the erratum.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) config ARM_ERRATA_818325_852422
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) This option enables the workaround for:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) instruction might deadlock. Fixed in r0p1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) - Cortex-A12 852422: Execution of a sequence of instructions might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) lead to either a data corruption or a CPU deadlock. Not fixed in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) any Cortex-A12 cores yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) This workaround for all both errata involves setting bit[12] of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) Feature Register. This bit disables an optimisation applied to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) sequence of 2 instructions that use opposing condition codes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) config ARM_ERRATA_821420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) This option enables the workaround for the 821420 Cortex-A12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) (all revs) erratum. In very rare timing conditions, a sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) of VMOV to Core registers instructions, for which the second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) one is in the shadow of a branch or abort, can lead to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) deadlock when the VMOV instructions are issued out-of-order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) config ARM_ERRATA_825619
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) This option enables the workaround for the 825619 Cortex-A12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) (all revs) erratum. Within rare timing constraints, executing a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) DMB NSHST or DMB ISHST instruction followed by a mix of Cacheable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) and Device/Strongly-Ordered loads and stores might cause deadlock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) config ARM_ERRATA_857271
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) bool "ARM errata: A12: CPU might deadlock under some very rare internal conditions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) This option enables the workaround for the 857271 Cortex-A12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) (all revs) erratum. Under very rare timing conditions, the CPU might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) hang. The workaround is expected to have a < 1% performance impact.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) config ARM_ERRATA_852421
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) bool "ARM errata: A17: DMB ST might fail to create order between stores"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) This option enables the workaround for the 852421 Cortex-A17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) (r1p0, r1p1, r1p2) erratum. Under very rare timing conditions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) execution of a DMB ST instruction might fail to properly order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) stores from GroupA and stores from GroupB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) config ARM_ERRATA_852423
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) This option enables the workaround for:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) - Cortex-A17 852423: Execution of a sequence of instructions might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) lead to either a data corruption or a CPU deadlock. Not fixed in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) any Cortex-A17 cores yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) This is identical to Cortex-A12 erratum 852422. It is a separate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) config option from the A12 erratum due to the way errata are checked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) for and handled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) config ARM_ERRATA_857272
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) bool "ARM errata: A17: CPU might deadlock under some very rare internal conditions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) This option enables the workaround for the 857272 Cortex-A17 erratum.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) This erratum is not known to be fixed in any A17 revision.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) This is identical to Cortex-A12 erratum 857271. It is a separate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) config option from the A12 erratum due to the way errata are checked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) for and handled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) source "arch/arm/common/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) menu "Bus support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) config ISA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) Find out whether you have ISA slots on your motherboard. ISA is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) name of a bus system, i.e. the way the CPU talks to the other stuff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) inside your box. Other bus systems are PCI, EISA, MicroChannel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) (MCA) or VESA. ISA is an older system, now being displaced by PCI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) newer boards don't support it. If you have ISA, say Y, otherwise N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) # Select ISA DMA controller support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) config ISA_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) select ISA_DMA_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) # Select ISA DMA interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) config ISA_DMA_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) config PCI_NANOENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) bool "BSE nanoEngine PCI support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) depends on SA1100_NANOENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) Enable PCI on the BSE nanoEngine board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) config ARM_ERRATA_814220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) The v7 ARM states that all cache and branch predictor maintenance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) operations that do not specify an address execute, relative to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) each other, in program order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) However, because of this erratum, an L2 set/way cache maintenance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) operation can overtake an L1 set/way cache maintenance operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) This ERRATA only affected the Cortex-A7 and present in r0p2, r0p3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) r0p4, r0p5.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) menu "Kernel Features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) config HAVE_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) This option should be selected by machines which have an SMP-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) capable CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) The only effect of this option is to make the SMP-related
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) options available to the user for configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) config SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) bool "Symmetric Multi-Processing"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) depends on CPU_V6K || CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) depends on GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) depends on HAVE_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) depends on MMU || ARM_MPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) select IRQ_WORK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) This enables support for systems with more than one CPU. If you have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) a system with only one CPU, say N. If you have a system with more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) than one CPU, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) If you say N here, the kernel will run on uni- and multiprocessor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) machines, but will use only one CPU of a multiprocessor machine. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) you say Y here, the kernel will run on many, but not all,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) uniprocessor machines. On a uniprocessor machine, the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) will run faster if you say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) See also <file:Documentation/x86/i386/IO-APIC.rst>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) <http://tldp.org/HOWTO/SMP-HOWTO.html>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) If you don't know what to do here, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) config SMP_ON_UP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) bool "Allow booting SMP kernel on uniprocessor systems"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) depends on SMP && !XIP_KERNEL && MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) SMP kernels contain instructions which fail on non-SMP processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) Enabling this option allows the kernel to modify itself to make
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) these instructions safe. Disabling it allows about 1K of space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) savings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) If you don't know what to do here, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) config ARM_CPU_TOPOLOGY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) bool "Support cpu topology definition"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) depends on SMP && CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) Support ARM cpu topology definition. The MPIDR register defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) affinity between processors which is then used to describe the cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) topology of an ARM System.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) config SCHED_MC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) bool "Multi-core scheduler support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) depends on ARM_CPU_TOPOLOGY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) Multi-core scheduler support improves the CPU scheduler's decision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) making when dealing with multi-core CPU chips at a cost of slightly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) increased overhead in some places. If unsure say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) config SCHED_SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) bool "SMT scheduler support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) depends on ARM_CPU_TOPOLOGY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) Improves the CPU scheduler's decision making when dealing with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) MultiThreading at a cost of slightly increased overhead in some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) places. If unsure say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) config HAVE_ARM_SCU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) This option enables support for the ARM snoop control unit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) config HAVE_ARM_ARCH_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) bool "Architected timer support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) depends on CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) select ARM_ARCH_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) This option enables support for the ARM architected timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) config HAVE_ARM_TWD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) This options enables support for the ARM timer and watchdog unit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) config MCPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) bool "Multi-Cluster Power Management"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) This option provides the common power management infrastructure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) for (multi-)cluster based systems, such as big.LITTLE based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) config MCPM_QUAD_CLUSTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) depends on MCPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) To avoid wasting resources unnecessarily, MCPM only supports up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) to 2 clusters by default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) Platforms with 3 or 4 clusters that use MCPM must select this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) option to allow the additional clusters to be managed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) config BIG_LITTLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) bool "big.LITTLE support (Experimental)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) depends on CPU_V7 && SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) select MCPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) This option enables support selections for the big.LITTLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) system architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) config BL_SWITCHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) bool "big.LITTLE switcher support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) depends on BIG_LITTLE && MCPM && HOTPLUG_CPU && ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) select CPU_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) The big.LITTLE "switcher" provides the core functionality to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) transparently handle transition between a cluster of A15's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) and a cluster of A7's in a big.LITTLE system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) config BL_SWITCHER_DUMMY_IF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) tristate "Simple big.LITTLE switcher user interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) depends on BL_SWITCHER && DEBUG_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) This is a simple and dummy char dev interface to control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) the big.LITTLE switcher core code. It is meant for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) debugging purposes only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) prompt "Memory split"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) default VMSPLIT_3G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) Select the desired split between kernel and user memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) If you are not absolutely sure what you are doing, leave this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) option alone!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) config VMSPLIT_3G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) bool "3G/1G user/kernel split"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) config VMSPLIT_3G_OPT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) depends on !ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) bool "3G/1G user/kernel split (for full 1G low memory)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) config VMSPLIT_2G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) bool "2G/2G user/kernel split"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) config VMSPLIT_1G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) bool "1G/3G user/kernel split"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) config PAGE_OFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) hex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) default PHYS_OFFSET if !MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) default 0x40000000 if VMSPLIT_1G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) default 0x80000000 if VMSPLIT_2G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) default 0xB0000000 if VMSPLIT_3G_OPT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) default 0xC0000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) config NR_CPUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) int "Maximum number of CPUs (2-32)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) range 2 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) depends on SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) default "4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) config HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) bool "Support for hot-pluggable CPUs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) depends on SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) select GENERIC_IRQ_MIGRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) Say Y here to experiment with turning CPUs off and on. CPUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) can be controlled through /sys/devices/system/cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) config ARM_PSCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) bool "Support for the ARM Power State Coordination Interface (PSCI)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) depends on HAVE_ARM_SMCCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) select ARM_PSCI_FW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) Say Y here if you want Linux to communicate with system firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) implementing the PSCI specification for CPU-centric power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) management operations described in ARM document number ARM DEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) 0022A ("Power State Coordination Interface System Software on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) ARM processors").
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) # The GPIO number here must be sorted by descending number. In case of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) # a multiplatform kernel, we just want the highest value required by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) # selected platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) config ARCH_NR_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) default 2048 if ARCH_SOCFPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) default 1024 if ARCH_BRCMSTB || ARCH_RENESAS || ARCH_TEGRA || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) ARCH_ZYNQ || ARCH_ASPEED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) default 416 if ARCH_SUNXI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) default 392 if ARCH_U8500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) default 352 if ARCH_VT8500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) default 288 if ARCH_ROCKCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) default 264 if MACH_H4700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) default 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) Maximum number of GPIOs in the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) If unsure, leave the default value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) config HZ_FIXED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) default 200 if ARCH_EBSA110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) default 128 if SOC_AT91RM9200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) default 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) depends on HZ_FIXED = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) prompt "Timer frequency"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) config HZ_100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) bool "100 Hz"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) config HZ_200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) bool "200 Hz"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) config HZ_250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) bool "250 Hz"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) config HZ_300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) bool "300 Hz"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) config HZ_500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) bool "500 Hz"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) config HZ_1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) bool "1000 Hz"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) config HZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) default HZ_FIXED if HZ_FIXED != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) default 100 if HZ_100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) default 200 if HZ_200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) default 250 if HZ_250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) default 300 if HZ_300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) default 500 if HZ_500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) default 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) config SCHED_HRTICK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) def_bool HIGH_RES_TIMERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) config THUMB2_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) default y if CPU_THUMBONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) select ARM_UNWIND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) By enabling this option, the kernel will be compiled in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) Thumb-2 mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) If unsure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) config ARM_PATCH_IDIV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) depends on CPU_32v7 && !XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) The ARM compiler inserts calls to __aeabi_idiv() and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) __aeabi_uidiv() when it needs to perform division on signed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) and unsigned integers. Some v7 CPUs have support for the sdiv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) and udiv instructions that can be used to implement those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) Enabling this option allows the kernel to modify itself to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) replace the first two instructions of these library functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) with the sdiv or udiv plus "bx lr" instructions when the CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) it is running on supports them. Typically this will be faster
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) and less power intensive than running the original library
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) code to do integer division.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) config AEABI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) bool "Use the ARM EABI to compile the kernel" if !CPU_V7 && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) !CPU_V7M && !CPU_V6 && !CPU_V6K && !CC_IS_CLANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) default CPU_V7 || CPU_V7M || CPU_V6 || CPU_V6K || CC_IS_CLANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) This option allows for the kernel to be compiled using the latest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) ARM ABI (aka EABI). This is only useful if you are using a user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) space environment that is also compiled with EABI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) Since there are major incompatibilities between the legacy ABI and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) EABI, especially with regard to structure member alignment, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) option also changes the kernel syscall calling convention to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) disambiguate both ABIs and allow for backward compatibility support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) (selected with CONFIG_OABI_COMPAT).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) To use this you need GCC version 4.0.0 or later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) config OABI_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) depends on AEABI && !THUMB2_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) This option preserves the old syscall interface along with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) new (ARM EABI) one. It also provides a compatibility layer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) intercept syscalls that have structure arguments which layout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) in memory differs between the legacy ABI and the new ARM EABI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) (only for non "thumb" binaries). This option adds a tiny
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) overhead to all syscalls and produces a slightly larger kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) The seccomp filter system will not be available when this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) selected, since there is no way yet to sensibly distinguish
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) between calling conventions during filtering.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) If you know you'll be using only pure EABI user space then you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) can say N here. If this option is not selected and you attempt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) to execute a legacy ABI binary then the result will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) UNPREDICTABLE (in fact it can be predicted that it won't work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) at all). If in doubt say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) config ARCH_HAS_HOLES_MEMORYMODEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) config ARCH_SELECT_MEMORY_MODEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) config ARCH_FLATMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) config ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) select SPARSEMEM_STATIC if SPARSEMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) config HAVE_ARCH_PFN_VALID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) config HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) bool "High Memory Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) The address space of ARM processors is only 4 Gigabytes large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) and it has to accommodate user address space, kernel address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) space as well as some memory mapped IO. That means that, if you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) have a large amount of physical memory and/or IO, not all of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) memory can be "permanently mapped" by the kernel. The physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) memory that is not permanently mapped is called "high memory".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) Depending on the selected kernel/user memory split, minimum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) vmalloc space and actual amount of RAM, you may not need this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) option which should result in a slightly faster kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) If unsure, say n.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) config HIGHPTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) bool "Allocate 2nd-level pagetables from highmem" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) depends on HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) The VM uses one page of physical memory for each page table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) For systems with a lot of processes, this can use a lot of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) precious low memory, eventually leading to low memory being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) consumed by page tables. Setting this option will allow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) user-space 2nd level page tables to reside in high memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) config CPU_SW_DOMAIN_PAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) bool "Enable use of CPU domains to implement privileged no-access"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) depends on MMU && !ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) Increase kernel security by ensuring that normal kernel accesses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) are unable to access userspace addresses. This can help prevent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) use-after-free bugs becoming an exploitable privilege escalation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) by ensuring that magic values (such as LIST_POISON) will always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) fault when dereferenced.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) CPUs with low-vector mappings use a best-efforts implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) Their lower 1MB needs to remain accessible for the vectors, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) the remainder of userspace will become appropriately inaccessible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) config HW_PERF_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) depends on ARM_PMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) config SYS_SUPPORTS_HUGETLBFS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) depends on ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) config HAVE_ARCH_TRANSPARENT_HUGEPAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) depends on ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) config ARCH_WANT_GENERAL_HUGETLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) config ARM_MODULE_PLTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) bool "Use PLTs to allow module memory to spill over into vmalloc area"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) depends on MODULES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) Allocate PLTs when loading modules so that jumps and calls whose
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) targets are too far away for their relative offsets to be encoded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) in the instructions themselves can be bounced via veneers in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) module's PLT. This allows modules to be allocated in the generic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) vmalloc area after the dedicated module memory area has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) exhausted. The modules will use slightly more memory, but after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) rounding up to page size, the actual memory footprint is usually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) the same.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) Disabling this is usually safe for small single-platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) configurations. If unsure, say y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) config FORCE_MAX_ZONEORDER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) int "Maximum zone order"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) default "12" if SOC_AM33XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) default "9" if SA1111 || ARCH_EFM32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) default "11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) The kernel memory allocator divides physically contiguous memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) blocks into "zones", where each zone is a power of two number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) pages. This option selects the largest power of two that the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) keeps in the memory allocator. If you need to allocate very large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) blocks of physically contiguous memory, then you may need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) increase this value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) This config option is actually maximum order plus one. For example,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) a value of 11 means that the largest free memory block is 2^10 pages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) config ALIGNMENT_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) depends on CPU_CP15_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) default y if !ARCH_EBSA110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) select HAVE_PROC_CPU if PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) ARM processors cannot fetch/store information which is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) naturally aligned on the bus, i.e., a 4 byte fetch must start at an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) address divisible by 4. On 32-bit ARM processors, these non-aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) fetch/store instructions will be emulated in software if you say
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) here, which has a severe performance impact. This is necessary for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) correct operation of some network protocols. With an IP-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) configuration it is safe to say N, otherwise say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) config UACCESS_WITH_MEMCPY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) default y if CPU_FEROCEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) Implement faster copy_to_user and clear_user methods for CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) cores where a 8-word STM instruction give significantly higher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) memory write throughput than a sequence of individual 32bit stores.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) A possible side effect is a slight increase in scheduling latency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) between threads sharing the same address space if they invoke
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) such copy operations with large buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) However, if the CPU data cache is using a write-allocate mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) this option is unlikely to provide any performance gain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) config PARAVIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) bool "Enable paravirtualization code"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) This changes the kernel so it can modify itself when it is run
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) under a hypervisor, potentially improving performance significantly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) over full virtualization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) config PARAVIRT_TIME_ACCOUNTING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) bool "Paravirtual steal time accounting"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) select PARAVIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) Select this option to enable fine granularity task steal time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) accounting. Time spent executing other tasks in parallel with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) the current vCPU is discounted from the vCPU power. To account for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) that, there can be a small performance impact.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) If in doubt, say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) config XEN_DOM0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) depends on XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) config XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) bool "Xen guest support on ARM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) depends on ARM && AEABI && OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) depends on CPU_V7 && !CPU_V6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) depends on !GENERIC_ATOMIC64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) select ARCH_DMA_ADDR_T_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) select ARM_PSCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) select SWIOTLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) select SWIOTLB_XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) select PARAVIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) config STACKPROTECTOR_PER_TASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) bool "Use a unique stack canary value for each task"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) depends on GCC_PLUGINS && STACKPROTECTOR && SMP && !XIP_DEFLATED_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) select GCC_PLUGIN_ARM_SSP_PER_TASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) Due to the fact that GCC uses an ordinary symbol reference from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) which to load the value of the stack canary, this value can only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) change at reboot time on SMP systems, and all tasks running in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) kernel's address space are forced to use the same canary value for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) the entire duration that the system is up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) Enable this option to switch to a different method that uses a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) different canary value for each task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) menu "Boot options"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) config USE_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) bool "Flattened Device Tree support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) select OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) Include support for flattened device tree machine descriptions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) config ATAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) bool "Support for the traditional ATAGS boot data passing" if USE_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) This is the traditional way of passing data to the kernel at boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) time. If you are solely relying on the flattened device tree (or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) to remove ATAGS support from your kernel binary. If unsure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) leave this to y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) config DEPRECATED_PARAM_STRUCT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) bool "Provide old way to pass kernel parameters"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) depends on ATAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) This was deprecated in 2001 and announced to live on for 5 years.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) Some old boot loaders still use this way.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) # Compressed boot loader in ROM. Yes, we really want to ask about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) # TEXT and BSS so we preserve their values in the config files.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) config ZBOOT_ROM_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) hex "Compressed ROM boot loader base address"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) default 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) The physical address at which the ROM-able zImage is to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) placed in the target. Platforms which normally make use of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) ROM-able zImage formats normally set this to a suitable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) value in their defconfig file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) If ZBOOT_ROM is not enabled, this has no effect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) config ZBOOT_ROM_BSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) hex "Compressed ROM boot loader BSS address"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) default 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) The base address of an area of read/write memory in the target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) for the ROM-able zImage which must be available while the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) decompressor is running. It must be large enough to hold the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) entire decompressed kernel plus an additional 128 KiB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) Platforms which normally make use of ROM-able zImage formats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) normally set this to a suitable value in their defconfig file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) If ZBOOT_ROM is not enabled, this has no effect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) config ZBOOT_ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) bool "Compressed boot loader in ROM/flash"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) Say Y here if you intend to execute your compressed kernel image
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) (zImage) directly from ROM or flash. If unsure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) config ARM_APPENDED_DTB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) With this option, the boot code will look for a device tree binary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) (DTB) appended to zImage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) This is meant as a backward compatibility convenience for those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) systems with a bootloader that can't be upgraded to accommodate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) the documented boot protocol using a device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) Beware that there is very little in terms of protection against
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) this option being confused by leftover garbage in memory that might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) look like a DTB header after a reboot if no actual DTB is appended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) to zImage. Do not leave this option active in a production kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) if you don't intend to always append a DTB. Proper passing of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) location into r2 of a bootloader provided DTB is always preferable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) to this option.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) config ARM_ATAG_DTB_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) bool "Supplement the appended DTB with traditional ATAG information"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) depends on ARM_APPENDED_DTB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) Some old bootloaders can't be updated to a DTB capable one, yet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) they provide ATAGs with memory configuration, the ramdisk address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) the kernel cmdline string, etc. Such information is dynamically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) provided by the bootloader and can't always be stored in a static
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) DTB. To allow a device tree enabled kernel to be used with such
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) bootloaders, this option allows zImage to extract the information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) from the ATAG list and store it at run time into the appended DTB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) bool "Use bootloader kernel arguments if available"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) Uses the command-line options passed by the boot loader instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) the device tree bootargs property. If the boot loader doesn't provide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) any, the device tree bootargs property will be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) bool "Extend with bootloader kernel arguments"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) The command-line arguments provided by the boot loader will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) appended to the the device tree bootargs property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) config CMDLINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) string "Default kernel command string"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) default ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) On some architectures (EBSA110 and CATS), there is currently no way
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) for the boot loader to pass arguments to the kernel. For these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) architectures, you should supply some command-line options at build
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) time by entering them here. As a minimum, you should specify the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) memory size and the root device (e.g., mem=64M root=/dev/nfs).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) prompt "Kernel command line type" if CMDLINE != ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) default CMDLINE_FROM_BOOTLOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) depends on ATAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) config CMDLINE_FROM_BOOTLOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) bool "Use bootloader kernel arguments if available"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) Uses the command-line options passed by the boot loader. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) the boot loader doesn't provide any, the default kernel command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) string provided in CMDLINE will be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) config CMDLINE_EXTEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) bool "Extend bootloader kernel arguments"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) The command-line arguments provided by the boot loader will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) appended to the default kernel command string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) config CMDLINE_FORCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) bool "Always use the default kernel command string"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) Always use the default kernel command string, even if the boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) loader passes other arguments to the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) This is useful if you cannot or don't want to change the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) command-line options your boot loader passes to the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) config XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) bool "Kernel Execute-In-Place from ROM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) Execute-In-Place allows the kernel to run from non-volatile storage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) directly addressable by the CPU, such as NOR flash. This saves RAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) space since the text section of the kernel is not loaded from flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) to RAM. Read-write sections, such as the data section and stack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) are still copied to RAM. The XIP kernel is not compressed since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) it has to run directly from flash, so it will take more space to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) store it. The flash address used to link the kernel object files,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) and for storing it, is configuration dependent. Therefore, if you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) say Y here, you must know the proper physical address where to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) store the kernel image depending on your own flash memory usage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) Also note that the make target becomes "make xipImage" rather than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) "make zImage" or "make Image". The final kernel binary to put in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) ROM memory will be arch/arm/boot/xipImage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) If unsure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) config XIP_PHYS_ADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) hex "XIP Kernel Physical Location"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) depends on XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) default "0x00080000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) This is the physical address in your flash memory the kernel will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) be linked for and stored to. This address is dependent on your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) own flash usage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) config XIP_DEFLATED_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) bool "Store kernel .data section compressed in ROM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) depends on XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) select ZLIB_INFLATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) Before the kernel is actually executed, its .data section has to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) copied to RAM from ROM. This option allows for storing that data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) in compressed form and decompressed to RAM rather than merely being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) copied, saving some precious ROM space. A possible drawback is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) slightly longer boot delay.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) config KEXEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) bool "Kexec system call (EXPERIMENTAL)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) depends on (!SMP || PM_SLEEP_SMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) select KEXEC_CORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) kexec is a system call that implements the ability to shutdown your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) current kernel, and to start another kernel. It is like a reboot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) but it is independent of the system firmware. And like a reboot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) you can start any kernel with it, not just Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) It is an ongoing process to be certain the hardware in a machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) is properly shutdown, so do not be surprised if this code does not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) initially work for you.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) config ATAGS_PROC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) bool "Export atags in procfs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) depends on ATAGS && KEXEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) Should the atags used to boot the kernel be exported in an "atags"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) file in procfs. Useful with kexec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) config CRASH_DUMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) bool "Build kdump crash kernel (EXPERIMENTAL)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) Generate crash dump after being started by kexec. This should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) be normally only set in special crash dump kernels which are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) loaded in the main kernel with kexec-tools into a specially
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) reserved region and then later executed after a crash by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) kdump/kexec. The crash dump kernel must be compiled to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) memory address not used by the main kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) For more details see Documentation/admin-guide/kdump/kdump.rst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) config AUTO_ZRELADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) bool "Auto calculation of the decompressed kernel image address"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) ZRELADDR is the physical address where the decompressed kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) image will be placed. If AUTO_ZRELADDR is selected, the address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) will be determined at run-time by masking the current IP with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) 0xf8000000. This assumes the zImage being placed in the first 128MB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) from start of memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) config EFI_STUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) config EFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) bool "UEFI runtime support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) depends on OF && !CPU_BIG_ENDIAN && MMU && AUTO_ZRELADDR && !XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) select UCS2_STRING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) select EFI_PARAMS_FROM_FDT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) select EFI_STUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) select EFI_GENERIC_STUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) select EFI_RUNTIME_WRAPPERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) This option provides support for runtime services provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) by UEFI firmware (such as non-volatile variables, realtime
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) clock, and platform reset). A UEFI stub is also provided to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) allow the kernel to be booted as an EFI application. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) is only useful for kernels that may run on systems that have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) UEFI firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) config DMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) bool "Enable support for SMBIOS (DMI) tables"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) depends on EFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) This enables SMBIOS/DMI feature for systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) This option is only useful on systems that have UEFI firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) However, even with this option, the resultant kernel should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) continue to boot on existing non-UEFI platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) NOTE: This does *NOT* enable or encourage the use of DMI quirks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) i.e., the the practice of identifying the platform via DMI to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) decide whether certain workarounds for buggy hardware and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) firmware need to be enabled. This would require the DMI subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) to be enabled much earlier than we do on ARM, which is non-trivial.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) menu "CPU Power Management"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) source "drivers/cpufreq/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) source "drivers/cpuidle/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) menu "Floating point emulation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) comment "At least one emulation must be selected"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) config FPE_NWFPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) bool "NWFPE math emulation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) Say Y to include the NWFPE floating point emulator in the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) This is necessary to run most binaries. Linux does not currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) support floating point hardware so you need to say Y here even if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) your machine has an FPA or floating point co-processor podule.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) You may say N here if you are going to load the Acorn FPEmulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) early in the bootup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) config FPE_NWFPE_XP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) bool "Support extended precision"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) depends on FPE_NWFPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) Say Y to include 80-bit support in the kernel floating-point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) emulator. Otherwise, only 32 and 64-bit support is compiled in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) Note that gcc does not generate 80-bit operations by default,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) so in most cases this option only enlarges the size of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) floating point emulator without any good reason.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) You almost surely want to say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) config FPE_FASTFPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) bool "FastFPE math emulation (EXPERIMENTAL)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) Say Y here to include the FAST floating point emulator in the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) This is an experimental much faster emulator which now also has full
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) precision for the mantissa. It does not support any exceptions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) It is very simple, and approximately 3-6 times faster than NWFPE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) It should be sufficient for most programs. It may be not suitable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) for scientific calculations, but you have to check this for yourself.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) If you do not feel you need a faster FP emulation you should better
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) choose NWFPE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) config VFP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) bool "VFP-format floating point maths"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) Say Y to include VFP support code in the kernel. This is needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) if your hardware includes a VFP unit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) Please see <file:Documentation/arm/vfp/release-notes.rst> for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) release notes and additional status information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) Say N if your target does not have VFP hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) config VFPv3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) depends on VFP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) default y if CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) config NEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) bool "Advanced SIMD (NEON) Extension support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) depends on VFPv3 && CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) Say Y to include support code for NEON, the ARMv7 Advanced SIMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) Extension.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) config KERNEL_MODE_NEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) bool "Support for NEON in kernel mode"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) depends on NEON && AEABI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) Say Y to include support for NEON in kernel mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) menu "Power management options"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) source "kernel/power/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) config ARCH_SUSPEND_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) config ARM_CPU_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) def_bool PM_SLEEP || BL_SWITCHER || ARM_PSCI_FW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) depends on ARCH_SUSPEND_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) config ARCH_HIBERNATION_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) depends on MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) default y if ARCH_SUSPEND_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) source "drivers/firmware/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) if CRYPTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) source "arch/arm/crypto/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) source "arch/arm/Kconfig.assembler"
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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