Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) # Kconfig for uClinux(non-paged MM) depend configurations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) # Hyok S. Choi <hyok.choi@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) # 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) config SET_MEM_PARAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	bool "Set flash/sdram size and base addr"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	 Say Y to manually set the base addresses and sizes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	 otherwise, the default values are assigned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) config DRAM_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	hex '(S)DRAM Base Address' if SET_MEM_PARAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	default 0x00800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) config DRAM_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	hex '(S)DRAM SIZE' if SET_MEM_PARAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	default 0x00800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) config FLASH_MEM_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	hex 'FLASH Base Address' if SET_MEM_PARAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	default 0x00400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) config FLASH_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	hex 'FLASH Size' if SET_MEM_PARAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	default 0x00400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) config PROCESSOR_ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	hex 'Hard wire the processor ID'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	default 0x00007700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	depends on !(CPU_CP15 || CPU_V7M)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	  If processor has no CP15 register, this processor ID is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	  used instead of the auto-probing which utilizes the register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) config REMAP_VECTORS_TO_RAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	bool 'Install vectors to the beginning of RAM'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	  The kernel needs to change the hardware exception vectors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	  In nommu mode, the hardware exception vectors are normally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	  placed at address 0x00000000. However, this region may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	  occupied by read-only memory depending on H/W design.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	  If the region contains read-write memory, say 'n' here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	  If your CPU provides a remap facility which allows the exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	  vectors to be mapped to writable memory, say 'n' here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	  Otherwise, say 'y' here.  In this case, the kernel will require
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	  external support to redirect the hardware exception vectors to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	  the writable versions located at DRAM_BASE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) config ARM_MPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)        bool 'Use the ARM v7 PMSA Compliant MPU'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)        depends on CPU_V7 || CPU_V7M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)        default y if CPU_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)        help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)          Some ARM systems without an MMU have instead a Memory Protection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)          Unit (MPU) that defines the type and permissions for regions of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)          memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)          If your CPU has an MPU then you should choose 'y' here unless you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)          know that you do not want to use the MPU.