Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * RajeshwarR: Dec 11, 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *   -- Added support for Inter Processor Interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Vineetg: Nov 1st, 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *    -- Initial Write (Borrowed heavily from ARM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/sched/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/profile.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/cpumask.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/mach_desc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #ifndef CONFIG_ARC_HAS_LLSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) EXPORT_SYMBOL_GPL(smp_atomic_ops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) EXPORT_SYMBOL_GPL(smp_bitops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) struct plat_smp_ops  __weak plat_smp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) /* XXX: per cpu ? Only needed once in early seconday boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) struct task_struct *secondary_idle_tsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /* Called from start_kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) void __init smp_prepare_boot_cpu(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static int __init arc_get_cpu_map(const char *name, struct cpumask *cpumask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	unsigned long dt_root = of_get_flat_dt_root();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	const char *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	buf = of_get_flat_dt_prop(dt_root, name, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	if (cpulist_parse(buf, cpumask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  * Read from DeviceTree and setup cpu possible mask. If there is no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static void __init arc_init_cpu_possible(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct cpumask cpumask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	if (arc_get_cpu_map("possible-cpus", &cpumask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			NR_CPUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		cpumask_setall(&cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (!cpumask_test_cpu(0, &cpumask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		panic("Master cpu (cpu[0]) is missed in cpu possible mask!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	init_cpu_possible(&cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * Called from setup_arch() before calling setup_processor()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * - Initialise the CPU possible map early - this describes the CPUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  *   which may be present or become present in the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  * - Call early smp init hook. This can initialize a specific multi-core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  *   IP which is say common to several platforms (hence not part of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  *   platform specific int_early() hook)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) void __init smp_init_cpus(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	arc_init_cpu_possible();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (plat_smp_ops.init_early_smp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		plat_smp_ops.init_early_smp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* called from init ( ) =>  process 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) void __init smp_prepare_cpus(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	 * if platform didn't set the present map already, do it now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	 * boot cpu is set to present already by init/main.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (num_present_cpus() <= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		init_cpu_present(cpu_possible_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void __init smp_cpus_done(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  * Default smp boot helper for Run-on-reset case where all cores start off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  * together. Non-masters need to wait for Master to start running.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)  * This is implemented using a flag in memory, which Non-masters spin-wait on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)  * Master sets it to cpu-id of core to "ungate" it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static volatile int wake_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #ifdef CONFIG_ISA_ARCOMPACT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define __boot_read(f)		f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define __boot_write(f, v)	f = v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define __boot_read(f)		arc_read_uncached_32(&f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define __boot_write(f, v)	arc_write_uncached_32(&f, v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	BUG_ON(cpu == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	__boot_write(wake_flag, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) void arc_platform_smp_wait_to_boot(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	/* for halt-on-reset, we've waited already */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	while (__boot_read(wake_flag) != cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	__boot_write(wake_flag, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) const char *arc_platform_smp_cpuinfo(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	return plat_smp_ops.info ? : "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  * The very first "C" code executed by secondary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  * Called from asm stub in head.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)  * "current"/R25 already setup by low level boot code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) void start_kernel_secondary(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct mm_struct *mm = &init_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	unsigned int cpu = smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	/* MMU, Caches, Vector Table, Interrupts etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	setup_processor();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	mmget(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	mmgrab(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	current->active_mm = mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	cpumask_set_cpu(cpu, mm_cpumask(mm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	/* Some SMP H/w setup - for each cpu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (plat_smp_ops.init_per_cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		plat_smp_ops.init_per_cpu(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	if (machine_desc->init_per_cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		machine_desc->init_per_cpu(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	notify_cpu_starting(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	set_cpu_online(cpu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	local_irq_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)  * Called from kernel_init( ) -> smp_init( ) - for each CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)  * At this point, Secondary Processor  is "HALT"ed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)  *  -It booted, but was halted in head.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  *  -It was configured to halt-on-reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  *  So need to wake it up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)  * Essential requirements being where to run from (PC) and stack (SP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int __cpu_up(unsigned int cpu, struct task_struct *idle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	unsigned long wait_till;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	secondary_idle_tsk = idle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	pr_info("Idle Task [%d] %p", cpu, idle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	pr_info("Trying to bring up CPU%u ...\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (plat_smp_ops.cpu_kick)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		plat_smp_ops.cpu_kick(cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 				(unsigned long)first_lines_of_secondary);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		arc_default_smp_cpu_kick(cpu, (unsigned long)NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	/* wait for 1 sec after kicking the secondary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	wait_till = jiffies + HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	while (time_before(jiffies, wait_till)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		if (cpu_online(cpu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (!cpu_online(cpu)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		pr_info("Timeout: CPU%u FAILED to come up !!!\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	secondary_idle_tsk = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)  * not supported here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int setup_profiling_timer(unsigned int multiplier)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /*              Inter Processor Interrupt Handling                           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) enum ipi_msg_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	IPI_EMPTY = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	IPI_RESCHEDULE = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	IPI_CALL_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	IPI_CPU_STOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)  * In arches with IRQ for each msg type (above), receiver can use IRQ-id  to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)  * figure out what msg was sent. For those which don't (ARC has dedicated IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)  * IRQ), the msg-type needs to be conveyed via per-cpu data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static DEFINE_PER_CPU(unsigned long, ipi_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	unsigned long old, new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	 * Atomically write new msg bit (in case others are writing too),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	 * and read back old value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		new = old = READ_ONCE(*ipi_data_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		new |= 1U << msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	} while (cmpxchg(ipi_data_ptr, old, new) != old);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	 * Call the platform specific IPI kick function, but avoid if possible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	 * Only do so if there's no pending msg from other concurrent sender(s).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	 * Otherwise, recevier will see this msg as well when it takes the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	 * IPI corresponding to that msg. This is true, even if it is already in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	 * IPI handler, because !@old means it has not yet dequeued the msg(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	 * so @new msg can be a free-loader
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	if (plat_smp_ops.ipi_send && !old)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		plat_smp_ops.ipi_send(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	for_each_cpu(cpu, callmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		ipi_send_msg_one(cpu, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) void smp_send_reschedule(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	ipi_send_msg_one(cpu, IPI_RESCHEDULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) void smp_send_stop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	struct cpumask targets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	cpumask_copy(&targets, cpu_online_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	cpumask_clear_cpu(smp_processor_id(), &targets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	ipi_send_msg(&targets, IPI_CPU_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) void arch_send_call_function_single_ipi(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	ipi_send_msg_one(cpu, IPI_CALL_FUNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) void arch_send_call_function_ipi_mask(const struct cpumask *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	ipi_send_msg(mask, IPI_CALL_FUNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)  * ipi_cpu_stop - handle IPI from smp_send_stop()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static void ipi_cpu_stop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	machine_halt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static inline int __do_IPI(unsigned long msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	switch (msg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	case IPI_RESCHEDULE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		scheduler_ipi();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	case IPI_CALL_FUNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		generic_smp_call_function_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	case IPI_CPU_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		ipi_cpu_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		rc = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)  * arch-common ISR to handle for inter-processor interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)  * Has hooks for platform specific IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) irqreturn_t do_IPI(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	unsigned long pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	unsigned long __maybe_unused copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	pr_debug("IPI [%ld] received on cpu %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		 *this_cpu_ptr(&ipi_data), smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	if (plat_smp_ops.ipi_clear)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		plat_smp_ops.ipi_clear(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	 * "dequeue" the msg corresponding to this IPI (and possibly other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	 * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	copy = pending = xchg(this_cpu_ptr(&ipi_data), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		unsigned long msg = __ffs(pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		rc = __do_IPI(msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 			pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		pending &= ~(1U << msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	} while (pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)  * API called by platform code to hookup arch-common ISR to their IPI IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)  * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)  * function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)  * request_percpu_irq() below will fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static DEFINE_PER_CPU(int, ipi_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	int *dev = per_cpu_ptr(&ipi_dev, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	unsigned int virq = irq_find_mapping(NULL, hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	if (!virq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		panic("Cannot find virq for root domain and hwirq=%lu", hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	/* Boot cpu calls request, all call enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	if (!cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 		if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 			panic("Percpu IRQ request failed for %u\n", virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	enable_percpu_irq(virq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }