^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef __ASM_IRQFLAGS_ARCV2_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define __ASM_IRQFLAGS_ARCV2_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/arcregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* status32 Bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define STATUS_AD_BIT 19 /* Disable Align chk: core supports non-aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define STATUS_IE_BIT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define STATUS_AD_MASK (1<<STATUS_AD_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define STATUS_IE_MASK (1<<STATUS_IE_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* status32 Bits as encoded/expected by CLRI/SETI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CLRI_STATUS_IE_BIT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CLRI_STATUS_E_MASK 0xF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CLRI_STATUS_IE_MASK (1 << CLRI_STATUS_IE_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AUX_USER_SP 0x00D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AUX_IRQ_CTRL 0x00E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AUX_IRQ_LVL_PEND 0x200 /* Pending Intr across all levels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define AUX_IRQ_PRIORITY 0x206
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ICAUSE 0x40a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define AUX_IRQ_SELECT 0x40b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define AUX_IRQ_ENABLE 0x40c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* Was Intr taken in User Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define AUX_IRQ_ACT_BIT_U 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Hardware supports 16 priorities (0 highest, 15 lowest)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Linux by default runs at 1, priority 0 reserved for NMI style interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define ARCV2_IRQ_DEF_PRIO 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* seed value for status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define __AD_ENB STATUS_AD_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define __AD_ENB 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | __AD_ENB | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) (ARCV2_IRQ_DEF_PRIO << 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Save IRQ state and disable IRQs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static inline long arch_local_irq_save(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) __asm__ __volatile__(" clri %0 \n" : "=r" (flags) : : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * restore saved IRQ state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static inline void arch_local_irq_restore(unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) __asm__ __volatile__(" seti %0 \n" : : "r" (flags) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * Unconditionally Enable IRQs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static inline void arch_local_irq_enable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int irqact = read_aux_reg(AUX_IRQ_ACT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (irqact & 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) write_aux_reg(AUX_IRQ_ACT, irqact & ~0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) __asm__ __volatile__(" seti \n" : : : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * Unconditionally Disable IRQs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static inline void arch_local_irq_disable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) __asm__ __volatile__(" clri \n" : : : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * save IRQ state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static inline long arch_local_save_flags(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) " lr %0, [status32] \n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) : "=&r"(temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* To be compatible with irq_save()/irq_restore()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * encode the irq bits as expected by CLRI/SETI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * (this was needed to make CONFIG_TRACE_IRQFLAGS work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) temp = (1 << 5) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ((temp >> 1) & CLRI_STATUS_E_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * Query IRQ state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static inline int arch_irqs_disabled_flags(unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return !(flags & CLRI_STATUS_IE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static inline int arch_irqs_disabled(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return arch_irqs_disabled_flags(arch_local_save_flags());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static inline void arc_softirq_trigger(int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) write_aux_reg(AUX_IRQ_HINT, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static inline void arc_softirq_clear(int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) write_aux_reg(AUX_IRQ_HINT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #ifdef CONFIG_TRACE_IRQFLAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .macro TRACE_ASM_IRQ_DISABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) bl trace_hardirqs_off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .macro TRACE_ASM_IRQ_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) bl trace_hardirqs_on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .macro TRACE_ASM_IRQ_DISABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .macro TRACE_ASM_IRQ_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .macro IRQ_DISABLE scratch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) clri
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) TRACE_ASM_IRQ_DISABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .macro IRQ_ENABLE scratch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) TRACE_ASM_IRQ_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) seti
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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