^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2020 Synopsys, Inc. (www.synopsys.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef _ASM_ARC_FPU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define _ASM_ARC_FPU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifdef CONFIG_ISA_ARCOMPACT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* These DPFP regs need to be saved/restored across ctx-sw */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct arc_fpu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) unsigned int l, h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) } aux_dpfp[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define fpu_init_task(regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * ARCv2 FPU Control aux register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * - bits to enable Traps on Exceptions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * - Rounding mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * ARCv2 FPU Status aux register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * - FPU exceptions flags (Inv, Div-by-Zero, overflow, underflow, inexact)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * - Flag Write Enable to clear flags explicitly (vs. by fpu instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct arc_fpu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned int ctrl, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern void fpu_init_task(struct pt_regs *regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif /* !CONFIG_ISA_ARCOMPACT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct task_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) extern void fpu_save_restore(struct task_struct *p, struct task_struct *n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #else /* !CONFIG_ARC_FPU_SAVE_RESTORE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define fpu_save_restore(p, n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define fpu_init_task(regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif /* CONFIG_ARC_FPU_SAVE_RESTORE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #endif /* _ASM_ARC_FPU_H */