^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * several functions that help interpret ARC instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * used for unaligned accesses, kprobes and kgdb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __ARC_DISASM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __ARC_DISASM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) op_Bcc = 0, op_BLcc = 1, op_LD = 2, op_ST = 3, op_MAJOR_4 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) op_MAJOR_5 = 5, op_LD_ADD = 12, op_ADD_SUB_SHIFT = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) op_ADD_MOV_CMP = 14, op_S = 15, op_LD_S = 16, op_LDB_S = 17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) op_LDW_S = 18, op_LDWX_S = 19, op_ST_S = 20, op_STB_S = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) op_STW_S = 22, op_Su5 = 23, op_SP = 24, op_GP = 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) op_Pcl = 26, op_MOV_S = 27, op_ADD_CMP = 28, op_BR_S = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) op_B_S = 30, op_BL_S = 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) enum flow {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) noflow,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) direct_jump,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) direct_call,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) indirect_jump,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) indirect_call,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) invalid_instr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define IS_BIT(word, n) ((word) & (1<<n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define BITS(word, s, e) (((word) >> (s)) & (~((-2) << ((e) - (s)))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define MAJOR_OPCODE(word) (BITS((word), 27, 31))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define MINOR_OPCODE(word) (BITS((word), 16, 21))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define FIELD_A(word) (BITS((word), 0, 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define FIELD_B(word) ((BITS((word), 12, 14)<<3) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) (BITS((word), 24, 26)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define FIELD_C(word) (BITS((word), 6, 11))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define FIELD_u6(word) FIELDC(word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define FIELD_s12(word) sign_extend(((BITS((word), 0, 5) << 6) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) BITS((word), 6, 11)), 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* note that for BL/BRcc these two macro's need another AND statement to mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * out bit 1 (make the result a multiple of 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define FIELD_s9(word) sign_extend(((BITS(word, 15, 15) << 8) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) BITS(word, 16, 23)), 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define FIELD_s21(word) sign_extend(((BITS(word, 6, 15) << 11) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) (BITS(word, 17, 26) << 1)), 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define FIELD_s25(word) sign_extend(((BITS(word, 0, 3) << 21) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) (BITS(word, 6, 15) << 11) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) (BITS(word, 17, 26) << 1)), 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* note: these operate on 16 bits! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define FIELD_S_A(word) ((BITS((word), 2, 2)<<3) | BITS((word), 0, 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define FIELD_S_B(word) ((BITS((word), 10, 10)<<3) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) BITS((word), 8, 10))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define FIELD_S_C(word) ((BITS((word), 7, 7)<<3) | BITS((word), 5, 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define FIELD_S_H(word) ((BITS((word), 0, 2)<<3) | BITS((word), 5, 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define FIELD_S_u5(word) (BITS((word), 0, 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define FIELD_S_u6(word) (BITS((word), 0, 4) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define FIELD_S_u7(word) (BITS((word), 0, 4) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define FIELD_S_u10(word) (BITS((word), 0, 7) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define FIELD_S_s7(word) sign_extend(BITS((word), 0, 5) << 1, 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define FIELD_S_s8(word) sign_extend(BITS((word), 0, 7) << 1, 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define FIELD_S_s9(word) sign_extend(BITS((word), 0, 8), 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define FIELD_S_s10(word) sign_extend(BITS((word), 0, 8) << 1, 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define FIELD_S_s11(word) sign_extend(BITS((word), 0, 8) << 2, 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define FIELD_S_s13(word) sign_extend(BITS((word), 0, 10) << 2, 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define STATUS32_L 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define REG_LIMM 62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct disasm_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* generic info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned long words[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int instr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int major_opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* info for branch/jump */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int is_branch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int delay_slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) enum flow flow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* info for load/store */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int src1, src2, src3, dest, wb_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int zz, aa, x, pref, di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int fault, write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static inline int sign_extend(int value, int bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (IS_BIT(value, (bits - 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) value |= (0xffffffff << bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static inline int is_short_instr(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) uint16_t word = *((uint16_t *)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int opcode = (word >> 11) & 0x1F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return (opcode >= 0x0B);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) void disasm_instr(unsigned long addr, struct disasm_state *state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int userspace, struct pt_regs *regs, struct callee_regs *cregs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int disasm_next_pc(unsigned long pc, struct pt_regs *regs, struct callee_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *cregs, unsigned long *fall_thru, unsigned long *target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) long get_reg(int reg, struct pt_regs *regs, struct callee_regs *cregs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) void set_reg(int reg, long val, struct pt_regs *regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct callee_regs *cregs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #endif /* __ARC_DISASM_H__ */