Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 1993, 2000 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Delay routines, using a pre-computed "loops_per_jiffy" value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/sched.h> /* for udelay's use of smp_processor_id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * Use only for very small delays (< 1 msec). 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * The active part of our cycle counter is only 32-bits wide, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * we're treating the difference between two marks as signed.  On
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * a 1GHz box, that's about 2 seconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) __delay(int loops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		"	rpcc %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		"	addl %1,%0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		"1:	rpcc %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		"	subl %1,%0,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		"	bgt %0,1b"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		: "=&r" (tmp), "=r" (loops) : "1"(loops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) EXPORT_SYMBOL(__delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LPJ	 cpu_data[smp_processor_id()].loops_per_jiffy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LPJ	 loops_per_jiffy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) udelay(unsigned long usecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	usecs *= (((unsigned long)HZ << 32) / 1000000) * LPJ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	__delay((long)usecs >> 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) EXPORT_SYMBOL(udelay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ndelay(unsigned long nsecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	nsecs *= (((unsigned long)HZ << 32) / 1000000000) * LPJ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	__delay((long)nsecs >> 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) EXPORT_SYMBOL(ndelay);