Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * linux/arch/alpha/lib/memset.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * This is an efficient (and small) implementation of the C library "memset()"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * function for the alpha.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *	(C) Copyright 1996 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * This routine is "moral-ware": you are free to use it any way you wish, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * the only obligation I put on you is a moral one: if you make any improvements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * to the routine, please send me your improvements for me to use similarly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * The scheduling comments are according to the EV5 documentation (and done by 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * hand, so they might well be incorrect, please do tell me about it..)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	.set noat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	.set noreorder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	.globl memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	.globl __memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	.globl ___memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	.globl __memset16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	.globl __constant_c_memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	.ent ___memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) .align 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) ___memset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	.frame $30,0,$26,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	.prologue 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	and $17,255,$1		/* E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	insbl $17,1,$17		/* .. E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	bis $17,$1,$17		/* E0 (p-c latency, next cycle) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	sll $17,16,$1		/* E1 (p-c latency, next cycle) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	bis $17,$1,$17		/* E0 (p-c latency, next cycle) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	sll $17,32,$1		/* E1 (p-c latency, next cycle) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	bis $17,$1,$17		/* E0 (p-c latency, next cycle) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	ldq_u $31,0($30)	/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) .align 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) __constant_c_memset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	addq $18,$16,$6		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	bis $16,$16,$0		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	xor $16,$6,$1		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	ble $18,end		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	bic $1,7,$1		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	beq $1,within_one_quad	/* .. E1 (note EV5 zero-latency forwarding) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	and $16,7,$3		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	beq $3,aligned		/* .. E1 (note EV5 zero-latency forwarding) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	ldq_u $4,0($16)		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	bis $16,$16,$5		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	insql $17,$16,$2	/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	subq $3,8,$3		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	addq $18,$3,$18		/* E0	$18 is new count ($3 is negative) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	mskql $4,$16,$4		/* .. E1 (and possible load stall) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	subq $16,$3,$16		/* E0 	$16 is new aligned destination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	bis $2,$4,$1		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	bis $31,$31,$31		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	ldq_u $31,0($30)	/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	stq_u $1,0($5)		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	bis $31,$31,$31		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) aligned:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	sra $18,3,$3		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	and $18,7,$18		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	bis $16,$16,$5		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	beq $3,no_quad		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) .align 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) loop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	stq $17,0($5)		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	subq $3,1,$3		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	addq $5,8,$5		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	bne $3,loop		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) no_quad:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	bis $31,$31,$31		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	beq $18,end		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	ldq $7,0($5)		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	mskqh $7,$6,$2		/* .. E1 (and load stall) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	insqh $17,$6,$4		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	bis $2,$4,$1		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	stq $1,0($5)		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	ret $31,($26),1		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) .align 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) within_one_quad:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	ldq_u $1,0($16)		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	insql $17,$16,$2	/* E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	mskql $1,$16,$4		/* E0 (after load stall) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	bis $2,$4,$2		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	mskql $2,$6,$4		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	mskqh $1,$6,$2		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	bis $2,$4,$1		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	stq_u $1,0($16)		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	ret $31,($26),1		/* E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.end ___memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) EXPORT_SYMBOL(___memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) EXPORT_SYMBOL(__constant_c_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	.align 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	.ent __memset16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) __memset16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	.prologue 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	inswl $17,0,$1		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	inswl $17,2,$2		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	inswl $17,4,$3		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	or $1,$2,$1		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	inswl $17,6,$4		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	or $1,$3,$1		/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	or $1,$4,$17		/* E0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	br __constant_c_memset	/* .. E1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	.end __memset16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) EXPORT_SYMBOL(__memset16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) memset = ___memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) __memset = ___memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	EXPORT_SYMBOL(memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	EXPORT_SYMBOL(__memset)