^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * include/asm-alpha/serial.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This assumes you have a 1.8432 MHz clock for your UART.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * It'd be nice if someone built a serial card with a 24.576 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * clock, since the 16550A is capable of handling a top speed of 1.5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * megabits/second; but this requires the faster clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define BASE_BAUD ( 1843200 / 16 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* Standard COM flags (except for COM4, because of the 8514 problem) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define STD_COM4_FLAGS (UPF_BOOT_AUTOCONF | UPF_AUTO_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define STD_COM4_FLAGS UPF_BOOT_AUTOCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SERIAL_PORT_DFNS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* UART CLK PORT IRQ FLAGS */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */