^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __ALPHA_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __ALPHA_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/scatterlist.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/machvec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The following structure is used to manage multiple PCI busses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct pci_iommu_arena;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* A controller. Used to manage multiple PCI busses. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct pci_controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct pci_controller *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct pci_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct resource *io_space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct resource *mem_space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* The following are for reporting to userland. The invariant is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) that if we report a BWX-capable dense memory, we do not report
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) a sparse memory at all, even if it exists. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long sparse_mem_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned long dense_mem_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned long sparse_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned long dense_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* This one's for the kernel only. It's in KSEG somewhere. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long config_space_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* For compatibility with current (as of July 2003) pciutils
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) and XFree86. Eventually will be removed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned int need_domain_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct pci_iommu_arena *sg_pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct pci_iommu_arena *sg_isa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void *sysdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Override the logic in pci_scan_bus for skipping already-configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) bus numbers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define pcibios_assign_all_busses() 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PCIBIOS_MIN_IO alpha_mv.min_io_address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* IOMMU controls. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* TODO: integrate with include/asm-generic/pci.h ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return channel ? 15 : 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline int pci_proc_domain(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct pci_controller *hose = bus->sysdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return hose->need_domain_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* Values for the `which' argument to sys_pciconfig_iobase. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define IOBASE_HOSE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define IOBASE_SPARSE_MEM 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define IOBASE_DENSE_MEM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define IOBASE_SPARSE_IO 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define IOBASE_DENSE_IO 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define IOBASE_ROOT_BUS 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define IOBASE_FROM_HOSE 0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) extern struct pci_dev *isa_bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) size_t count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) size_t count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct vm_area_struct *vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) enum pci_mmap_state mmap_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) extern void pci_adjust_legacy_attr(struct pci_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) enum pci_mmap_state mmap_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define HAVE_PCI_LEGACY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) extern int pci_create_resource_files(struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) extern void pci_remove_resource_files(struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #endif /* __ALPHA_PCI_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags