^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __ALPHA_PAL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __ALPHA_PAL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <uapi/asm/pal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) extern void halt(void) __attribute__((noreturn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define imb() \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) __asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define draina() \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) __asm__ __volatile__ ("call_pal %0 #draina" : : "i" (PAL_draina) : "memory")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define __CALL_PAL_R0(NAME, TYPE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern inline TYPE NAME(void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) register TYPE __r0 __asm__("$0"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) __asm__ __volatile__( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) "call_pal %1 # " #NAME \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) :"=r" (__r0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) :"i" (PAL_ ## NAME) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) :"$1", "$16", "$22", "$23", "$24", "$25"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) return __r0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define __CALL_PAL_W1(NAME, TYPE0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) extern inline void NAME(TYPE0 arg0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) register TYPE0 __r16 __asm__("$16") = arg0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) __asm__ __volatile__( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "call_pal %1 # "#NAME \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) : "=r"(__r16) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) : "i"(PAL_ ## NAME), "0"(__r16) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) : "$1", "$22", "$23", "$24", "$25"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define __CALL_PAL_W2(NAME, TYPE0, TYPE1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) register TYPE0 __r16 __asm__("$16") = arg0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) register TYPE1 __r17 __asm__("$17") = arg1; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) __asm__ __volatile__( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) "call_pal %2 # "#NAME \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) : "=r"(__r16), "=r"(__r17) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) : "$1", "$22", "$23", "$24", "$25"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define __CALL_PAL_RW1(NAME, RTYPE, TYPE0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) extern inline RTYPE NAME(TYPE0 arg0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) register RTYPE __r0 __asm__("$0"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) register TYPE0 __r16 __asm__("$16") = arg0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) __asm__ __volatile__( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) "call_pal %2 # "#NAME \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) : "=r"(__r16), "=r"(__r0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) : "i"(PAL_ ## NAME), "0"(__r16) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) : "$1", "$22", "$23", "$24", "$25"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return __r0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) register RTYPE __r0 __asm__("$0"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) register TYPE0 __r16 __asm__("$16") = arg0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) register TYPE1 __r17 __asm__("$17") = arg1; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) __asm__ __volatile__( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) "call_pal %3 # "#NAME \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) : "=r"(__r16), "=r"(__r17), "=r"(__r0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) : "$1", "$22", "$23", "$24", "$25"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return __r0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) __CALL_PAL_W1(cflush, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) __CALL_PAL_R0(rdmces, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) __CALL_PAL_R0(rdps, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) __CALL_PAL_R0(rdusp, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) __CALL_PAL_RW1(swpipl, unsigned long, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) __CALL_PAL_R0(whami, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) __CALL_PAL_W2(wrent, void*, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) __CALL_PAL_W1(wripir, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) __CALL_PAL_W1(wrkgp, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) __CALL_PAL_W1(wrmces, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) __CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) __CALL_PAL_W1(wrusp, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) __CALL_PAL_W1(wrvptptr, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) __CALL_PAL_RW1(wtint, unsigned long, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * TB routines..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define __tbi(nr,arg,arg1...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) register unsigned long __r16 __asm__("$16") = (nr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) register unsigned long __r17 __asm__("$17"); arg; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) __asm__ __volatile__( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) "call_pal %3 #__tbi" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) :"=r" (__r16),"=r" (__r17) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) :"0" (__r16),"i" (PAL_tbi) ,##arg1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) :"$0", "$1", "$22", "$23", "$24", "$25"); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define tbi(x,y) __tbi(x,__r17=(y),"1" (__r17))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define tbisi(x) __tbi(1,__r17=(x),"1" (__r17))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define tbisd(x) __tbi(2,__r17=(x),"1" (__r17))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define tbis(x) __tbi(3,__r17=(x),"1" (__r17))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define tbiap() __tbi(-1, /* no second argument */)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define tbia() __tbi(-2, /* no second argument */)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * QEMU Cserv routines..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static inline unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) qemu_get_walltime(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) register unsigned long v0 __asm__("$0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) register unsigned long a0 __asm__("$16") = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) asm("call_pal %2 # cserve get_time"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) : "=r"(v0), "+r"(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) : "i"(PAL_cserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) : "$17", "$18", "$19", "$20", "$21");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return v0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static inline unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) qemu_get_alarm(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) register unsigned long v0 __asm__("$0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) register unsigned long a0 __asm__("$16") = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) asm("call_pal %2 # cserve get_alarm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) : "=r"(v0), "+r"(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) : "i"(PAL_cserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) : "$17", "$18", "$19", "$20", "$21");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return v0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) qemu_set_alarm_rel(unsigned long expire)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) register unsigned long a0 __asm__("$16") = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) register unsigned long a1 __asm__("$17") = expire;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) asm volatile("call_pal %2 # cserve set_alarm_rel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) : "+r"(a0), "+r"(a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) : "i"(PAL_cserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) : "$0", "$18", "$19", "$20", "$21");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) qemu_set_alarm_abs(unsigned long expire)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) register unsigned long a0 __asm__("$16") = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) register unsigned long a1 __asm__("$17") = expire;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) asm volatile("call_pal %2 # cserve set_alarm_abs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) : "+r"(a0), "+r"(a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) : "i"(PAL_cserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) : "$0", "$18", "$19", "$20", "$21");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static inline unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) qemu_get_vmtime(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) register unsigned long v0 __asm__("$0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) register unsigned long a0 __asm__("$16") = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) asm("call_pal %2 # cserve get_time"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) : "=r"(v0), "+r"(a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) : "i"(PAL_cserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) : "$17", "$18", "$19", "$20", "$21");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return v0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #endif /* !__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #endif /* __ALPHA_PAL_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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