^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ALPHA_BITOPS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ALPHA_BITOPS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #ifndef _LINUX_BITOPS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #error only <linux/bitops.h> can be included directly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/compiler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/barrier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Copyright 1994, Linus Torvalds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * These have to be done with inline assembly: that way the bit-setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * is guaranteed to be atomic. All bit operations return 0 if the bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * was cleared before the operation and != 0 if it was not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * To get proper branch prediction for the main line, we must branch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * forward to code at the end of this object's .text section, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * branch back to restart the operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * bit 0 is the LSB of addr; bit 64 is the LSB of (addr+1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) set_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "1: ldl_l %0,%3\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) " bis %0,%2,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) " stl_c %0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) " beq %0,2f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ".subsection 2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) "2: br 1b\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ".previous"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) :"=&r" (temp), "=m" (*m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) :"Ir" (1UL << (nr & 31)), "m" (*m));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * WARNING: non atomic version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) __set_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *m |= 1 << (nr & 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) clear_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) "1: ldl_l %0,%3\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) " bic %0,%2,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) " stl_c %0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) " beq %0,2f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ".subsection 2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) "2: br 1b\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ".previous"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) :"=&r" (temp), "=m" (*m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) :"Ir" (1UL << (nr & 31)), "m" (*m));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) clear_bit_unlock(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) smp_mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) clear_bit(nr, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * WARNING: non atomic version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static __inline__ void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) __clear_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) *m &= ~(1 << (nr & 31));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) __clear_bit_unlock(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) smp_mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) __clear_bit(nr, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) change_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) "1: ldl_l %0,%3\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) " xor %0,%2,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) " stl_c %0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) " beq %0,2f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ".subsection 2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) "2: br 1b\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ".previous"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) :"=&r" (temp), "=m" (*m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) :"Ir" (1UL << (nr & 31)), "m" (*m));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * WARNING: non atomic version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static __inline__ void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) __change_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) *m ^= 1 << (nr & 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) test_and_set_bit(unsigned long nr, volatile void *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned long oldbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) " mb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) "1: ldl_l %0,%4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) " and %0,%3,%2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) " bne %2,2f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) " xor %0,%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) " stl_c %0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) " beq %0,3f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) "2:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) " mb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ".subsection 2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) "3: br 1b\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ".previous"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) :"=&r" (temp), "=m" (*m), "=&r" (oldbit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return oldbit != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) test_and_set_bit_lock(unsigned long nr, volatile void *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned long oldbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) "1: ldl_l %0,%4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) " and %0,%3,%2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) " bne %2,2f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) " xor %0,%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) " stl_c %0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) " beq %0,3f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) "2:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) " mb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ".subsection 2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) "3: br 1b\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ".previous"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) :"=&r" (temp), "=m" (*m), "=&r" (oldbit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return oldbit != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * WARNING: non atomic version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) __test_and_set_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) unsigned long mask = 1 << (nr & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int old = *m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) *m = old | mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return (old & mask) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) test_and_clear_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) unsigned long oldbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) " mb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) "1: ldl_l %0,%4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) " and %0,%3,%2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) " beq %2,2f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) " xor %0,%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) " stl_c %0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) " beq %0,3f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) "2:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) " mb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ".subsection 2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) "3: br 1b\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ".previous"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) :"=&r" (temp), "=m" (*m), "=&r" (oldbit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return oldbit != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * WARNING: non atomic version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) __test_and_clear_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) unsigned long mask = 1 << (nr & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int old = *m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) *m = old & ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return (old & mask) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) test_and_change_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned long oldbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) " mb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) "1: ldl_l %0,%4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) " and %0,%3,%2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) " xor %0,%3,%0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) " stl_c %0,%1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) " beq %0,3f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) " mb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ".subsection 2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) "3: br 1b\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ".previous"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) :"=&r" (temp), "=m" (*m), "=&r" (oldbit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return oldbit != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * WARNING: non atomic version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static __inline__ int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) __test_and_change_bit(unsigned long nr, volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) unsigned long mask = 1 << (nr & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) int *m = ((int *) addr) + (nr >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int old = *m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) *m = old ^ mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return (old & mask) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) test_bit(int nr, const volatile void * addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return (1UL & (((const int *) addr)[nr >> 5] >> (nr & 31))) != 0UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * ffz = Find First Zero in word. Undefined if no zero exists,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * so code should check against ~0UL first..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * Do a binary search on the bits. Due to the nature of large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * constants on the alpha, it is worthwhile to split the search.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static inline unsigned long ffz_b(unsigned long x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) unsigned long sum, x1, x2, x4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) x = ~x & -~x; /* set first 0 bit, clear others */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) x1 = x & 0xAA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) x2 = x & 0xCC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) x4 = x & 0xF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) sum = x2 ? 2 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) sum += (x4 != 0) * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) sum += (x1 != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return sum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static inline unsigned long ffz(unsigned long word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /* Whee. EV67 can calculate it directly. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return __kernel_cttz(~word);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) unsigned long bits, qofs, bofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) bits = __kernel_cmpbge(word, ~0UL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) qofs = ffz_b(bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) bits = __kernel_extbl(word, qofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) bofs = ffz_b(bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return qofs*8 + bofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * __ffs = Find First set bit in word. Undefined if no set bit exists.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static inline unsigned long __ffs(unsigned long word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* Whee. EV67 can calculate it directly. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return __kernel_cttz(word);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) unsigned long bits, qofs, bofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) bits = __kernel_cmpbge(0, word);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) qofs = ffz_b(bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) bits = __kernel_extbl(word, qofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) bofs = ffz_b(~bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return qofs*8 + bofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * ffs: find first bit set. This is defined the same way as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * the libc and compiler builtin ffs routines, therefore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * differs in spirit from the above __ffs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static inline int ffs(int word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) int result = __ffs(word) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return word ? result : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * fls: find last bit set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static inline int fls64(unsigned long word)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) return 64 - __kernel_ctlz(word);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) extern const unsigned char __flsm1_tab[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static inline int fls64(unsigned long x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) unsigned long t, a, r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) t = __kernel_cmpbge (x, 0x0101010101010101UL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) a = __flsm1_tab[t];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) t = __kernel_extbl (x, a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) r = a*8 + __flsm1_tab[t] + (x != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static inline unsigned long __fls(unsigned long x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return fls64(x) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static inline int fls(unsigned int x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return fls64(x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * hweightN: returns the hamming weight (i.e. the number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * of bits set) of a N-bit word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) /* Whee. EV67 can calculate it directly. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static inline unsigned long __arch_hweight64(unsigned long w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return __kernel_ctpop(w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static inline unsigned int __arch_hweight32(unsigned int w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) return __arch_hweight64(w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static inline unsigned int __arch_hweight16(unsigned int w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return __arch_hweight64(w & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static inline unsigned int __arch_hweight8(unsigned int w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return __arch_hweight64(w & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #include <asm-generic/bitops/arch_hweight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #include <asm-generic/bitops/const_hweight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #include <asm-generic/bitops/find.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * Every architecture must define this function. It's the fastest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * way of searching a 100-bit bitmap. It's guaranteed that at least
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * one of the 100 bits is cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static inline unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) sched_find_first_bit(const unsigned long b[2])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) unsigned long b0, b1, ofs, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) b0 = b[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) b1 = b[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) ofs = (b0 ? 0 : 64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) tmp = (b0 ? b0 : b1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return __ffs(tmp) + ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #include <asm-generic/bitops/le.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #include <asm-generic/bitops/ext2-atomic-setbit.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #endif /* _ALPHA_BITOPS_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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