^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) .. SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) IO-APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) =======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) :Author: Ingo Molnar <mingo@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Most (all) Intel-MP compliant SMP boards have the so-called 'IO-APIC',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) which is an enhanced interrupt controller. It enables us to route
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) hardware interrupts to multiple CPUs, or to CPU groups. Without an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) IO-APIC, interrupts from hardware will be delivered only to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) CPU which boots the operating system (usually CPU#0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Linux supports all variants of compliant SMP boards, including ones with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) multiple IO-APICs. Multiple IO-APICs are used in high-end servers to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) distribute IRQ load further.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) There are (a few) known breakages in certain older boards, such bugs are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) usually worked around by the kernel. If your MP-compliant SMP board does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) not boot Linux, then consult the linux-smp mailing list archives first.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) If your box boots fine with enabled IO-APIC IRQs, then your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /proc/interrupts will look like this one::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) hell:~> cat /proc/interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) CPU0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 0: 1360293 IO-APIC-edge timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 1: 4 IO-APIC-edge keyboard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 2: 0 XT-PIC cascade
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 13: 1 XT-PIC fpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 14: 1448 IO-APIC-edge ide0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 16: 28232 IO-APIC-level Intel EtherExpress Pro 10/100 Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 17: 51304 IO-APIC-level eth0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) NMI: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ERR: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) hell:~>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) Some interrupts are still listed as 'XT PIC', but this is not a problem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) none of those IRQ sources is performance-critical.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) In the unlikely case that your board does not create a working mp-table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) you can use the pirq= boot parameter to 'hand-construct' IRQ entries. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) is non-trivial though and cannot be automated. One sample /etc/lilo.conf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) entry::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) append="pirq=15,11,10"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) The actual numbers depend on your system, on your PCI cards and on their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) PCI slot position. Usually PCI slots are 'daisy chained' before they are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) connected to the PCI chipset IRQ routing facility (the incoming PIRQ1-4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) lines)::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ,-. ,-. ,-. ,-. ,-.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PIRQ4 ----| |-. ,-| |-. ,-| |-. ,-| |--------| |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) |S| \ / |S| \ / |S| \ / |S| |S|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PIRQ3 ----|l|-. `/---|l|-. `/---|l|-. `/---|l|--------|l|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) |o| \/ |o| \/ |o| \/ |o| |o|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PIRQ2 ----|t|-./`----|t|-./`----|t|-./`----|t|--------|t|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) |1| /\ |2| /\ |3| /\ |4| |5|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PIRQ1 ----| |- `----| |- `----| |- `----| |--------| |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) `-' `-' `-' `-' `-'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Every PCI card emits a PCI IRQ, which can be INTA, INTB, INTC or INTD::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ,-.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) INTD--| |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) |S|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) INTC--|l|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) |o|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) INTB--|t|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) |x|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) INTA--| |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) `-'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) These INTA-D PCI IRQs are always 'local to the card', their real meaning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) depends on which slot they are in. If you look at the daisy chaining diagram,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) a card in slot4, issuing INTA IRQ, it will end up as a signal on PIRQ4 of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) the PCI chipset. Most cards issue INTA, this creates optimal distribution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) between the PIRQ lines. (distributing IRQ sources properly is not a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) necessity, PCI IRQs can be shared at will, but it's a good for performance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) to have non shared interrupts). Slot5 should be used for videocards, they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) do not use interrupts normally, thus they are not daisy chained either.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) so if you have your SCSI card (IRQ11) in Slot1, Tulip card (IRQ9) in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) Slot2, then you'll have to specify this pirq= line::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) append="pirq=11,9"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) the following script tries to figure out such a default pirq= line from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) your PCI configuration::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) echo -n pirq=; echo `scanpci | grep T_L | cut -c56-` | sed 's/ /,/g'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) note that this script won't work if you have skipped a few slots or if your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) board does not do default daisy-chaining. (or the IO-APIC has the PIRQ pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) connected in some strange way). E.g. if in the above case you have your SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) card (IRQ11) in Slot3, and have Slot1 empty::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) append="pirq=0,9,11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) [value '0' is a generic 'placeholder', reserved for empty (or non-IRQ emitting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) slots.]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) Generally, it's always possible to find out the correct pirq= settings, just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) permute all IRQ numbers properly ... it will take some time though. An
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 'incorrect' pirq line will cause the booting process to hang, or a device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) won't function properly (e.g. if it's inserted as a module).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) If you have 2 PCI buses, then you can use up to 8 pirq values, although such
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) boards tend to have a good configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) Be prepared that it might happen that you need some strange pirq line::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) append="pirq=0,0,0,0,0,0,9,11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) Use smart trial-and-error techniques to find out the correct pirq line ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Good luck and mail to linux-smp@vger.kernel.org or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) linux-kernel@vger.kernel.org if you have any problems that are not covered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) by this document.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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