^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) =========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Mellanox watchdog drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) for x86 based system switches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) =============================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) This driver provides watchdog functionality for various Mellanox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Ethernet and Infiniband switch systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Mellanox watchdog device is implemented in a programmable logic device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) There are 2 types of HW watchdog implementations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Type 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Actual HW timeout can be defined as a power of 2 msec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) e.g. timeout 20 sec will be rounded up to 32768 msec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) The maximum timeout period is 32 sec (32768 msec.),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Get time-left isn't supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Type 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Actual HW timeout is defined in sec. and it's the same as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) a user-defined timeout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Maximum timeout is 255 sec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Get time-left is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Type 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Same as Type 2 with extended maximum timeout period.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Maximum timeout is 65535 sec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Type 1 HW watchdog implementation exist in old systems and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) all new systems have type 2 HW watchdog.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) Two types of HW implementation have also different register map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Type 3 HW watchdog implementation can exist on all Mellanox systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) with new programmer logic device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) It's differentiated by WD capability bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) Old systems still have only one main watchdog.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Mellanox system can have 2 watchdogs: main and auxiliary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Main and auxiliary watchdog devices can be enabled together
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) on the same system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) There are several actions that can be defined in the watchdog:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) system reset, start fans on full speed and increase register counter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) The last 2 actions are performed without a system reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Actions without reset are provided for auxiliary watchdog device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) which is optional.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Watchdog can be started during a probe, in this case it will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) pinged by watchdog core before watchdog device will be opened by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) user space application.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Watchdog can be initialised in nowayout way, i.e. oncse started
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) it can't be stopped.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) This mlx-wdt driver supports both HW watchdog implementations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) Watchdog driver is probed from the common mlx_platform driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) Mlx_platform driver provides an appropriate set of registers for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) Mellanox watchdog device, identity name (mlx-wdt-main or mlx-wdt-aux),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) initial timeout, performed action in expiration and configuration flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) watchdog configuration flags: nowayout and start_at_boot, hw watchdog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) version - type1 or type2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) The driver checks during initialization if the previous system reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) was done by the watchdog. If yes, it makes a notification about this event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Access to HW registers is performed through a generic regmap interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) Programmable logic device registers have little-endian order.