^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Kernel driver w1_ds28e04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) supported family codes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ================= ====
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) W1_FAMILY_DS28E04 0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) ================= ====
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Author: Markus Franke, <franke.m@sebakmt.com> <franm@hrz.tu-chemnitz.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Support is provided through the sysfs files "eeprom" and "pio". CRC checking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) during memory accesses can optionally be enabled/disabled via the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) attribute "crccheck". The strong pull-up can optionally be enabled/disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) via the module parameter "w1_strong_pullup".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Memory Access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) A read operation on the "eeprom" file reads the given amount of bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) from the EEPROM of the DS28E04.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) A write operation on the "eeprom" file writes the given byte sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) to the EEPROM of the DS28E04. If CRC checking mode is enabled only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) fully aligned blocks of 32 bytes with valid CRC16 values (in bytes 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) and 31) are allowed to be written.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PIO Access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) The 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) The current status of the PIO's is returned as an 8 bit value. Bit 0/1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) driven low-active, i.e. the driver delivers/expects low-active values.