^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ===================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) spi_butterfly - parport-to-butterfly adapter driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ===================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) This is a hardware and software project that includes building and using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) a parallel port adapter cable, together with an "AVR Butterfly" to run
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) firmware for user interfacing and/or sensors. A Butterfly is a $US20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) battery powered card with an AVR microcontroller and lots of goodies:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) sensors, LCD, flash, toggle stick, and more. You can use AVR-GCC to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) develop firmware for this, and flash it using this adapter cable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) You can make this adapter from an old printer cable and solder things
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) directly to the Butterfly. Or (if you have the parts and skills) you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) can come up with something fancier, providing ciruit protection to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Butterfly and the printer port, or with a better power supply than two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) signal pins from the printer port. Or for that matter, you can use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) similar cables to talk to many AVR boards, even a breadboard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) This is more powerful than "ISP programming" cables since it lets kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SPI protocol drivers interact with the AVR, and could even let the AVR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) issue interrupts to them. Later, your protocol driver should work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) easily with a "real SPI controller", instead of this bitbanger.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) The first cable connections will hook Linux up to one SPI bus, with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) AVR and a DataFlash chip; and to the AVR reset line. This is all you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) need to reflash the firmware, and the pins are the standard Atmel "ISP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) connector pins (used also on non-Butterfly AVR boards). On the parport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) side this is like "sp12" programming cables.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ====== ============= ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Signal Butterfly Parport (DB-25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ====== ============= ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) SCK J403.PB1/SCK pin 2/D0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) RESET J403.nRST pin 3/D1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) VCC J403.VCC_EXT pin 8/D6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MOSI J403.PB2/MOSI pin 9/D7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MISO J403.PB3/MISO pin 11/S7,nBUSY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) GND J403.GND pin 23/GND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ====== ============= ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Then to let Linux master that bus to talk to the DataFlash chip, you must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) (a) flash new firmware that disables SPI (set PRR.2, and disable pullups
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) by clearing PORTB.[0-3]); (b) configure the mtd_dataflash driver; and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) (c) cable in the chipselect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ====== ============ ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Signal Butterfly Parport (DB-25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ====== ============ ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) VCC J400.VCC_EXT pin 7/D5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) SELECT J400.PB0/nSS pin 17/C3,nSELECT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) GND J400.GND pin 24/GND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ====== ============ ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Or you could flash firmware making the AVR into an SPI slave (keeping the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) DataFlash in reset) and tweak the spi_butterfly driver to make it bind to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) the driver for your custom SPI-based protocol.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) The "USI" controller, using J405, can also be used for a second SPI bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) That would let you talk to the AVR using custom SPI-with-USI firmware,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) while letting either Linux or the AVR use the DataFlash. There are plenty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) of spare parport pins to wire this one up, such as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ====== ============= ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Signal Butterfly Parport (DB-25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ====== ============= ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) SCK J403.PE4/USCK pin 5/D3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MOSI J403.PE5/DI pin 6/D4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MISO J403.PE6/DO pin 12/S5,nPAPEROUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) GND J403.GND pin 22/GND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) IRQ J402.PF4 pin 10/S6,ACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) GND J402.GND(P2) pin 25/GND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ====== ============= ===================
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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