^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) =======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ASoC Codec Class Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) The codec class driver is generic and hardware independent code that configures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) the codec, FM, MODEM, BT or external DSP to provide audio capture and playback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) It should contain no code that is specific to the target platform or machine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) All platform and machine specific code should be added to the platform and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) machine drivers respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Each codec class driver *must* provide the following features:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 1. Codec DAI and PCM configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 2. Codec control IO - using RegMap API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 3. Mixers and audio controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 4. Codec audio operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 5. DAPM description.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 6. DAPM event handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Optionally, codec drivers can also provide:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 7. DAC Digital mute control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Its probably best to use this guide in conjunction with the existing codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) driver code in sound/soc/codecs/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) ASoC Codec driver breakdown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ===========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Codec DAI and PCM configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) -------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Each codec driver must have a struct snd_soc_dai_driver to define its DAI and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PCM capabilities and operations. This struct is exported so that it can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) registered with the core by your machine driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) e.g.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static struct snd_soc_dai_ops wm8731_dai_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .prepare = wm8731_pcm_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .hw_params = wm8731_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .shutdown = wm8731_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .digital_mute = wm8731_mute,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .set_sysclk = wm8731_set_dai_sysclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .set_fmt = wm8731_set_dai_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct snd_soc_dai_driver wm8731_dai = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .name = "wm8731-hifi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .playback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .stream_name = "Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .rates = WM8731_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .formats = WM8731_FORMATS,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .capture = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .stream_name = "Capture",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .channels_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .channels_max = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .rates = WM8731_RATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .formats = WM8731_FORMATS,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .ops = &wm8731_dai_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .symmetric_rates = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) Codec control IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) The codec can usually be controlled via an I2C or SPI style interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) (AC97 combines control with data in the DAI). The codec driver should use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) Regmap API for all codec IO. Please see include/linux/regmap.h and existing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) codec drivers for example regmap usage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Mixers and audio controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) -------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) All the codec mixers and audio controls can be defined using the convenience
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) macros defined in soc.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define SOC_SINGLE(xname, reg, shift, mask, invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) Defines a single control as follows:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) xname = Control name e.g. "Playback Volume"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) reg = codec register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) shift = control bit(s) offset in register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) mask = control bit size(s) e.g. mask of 7 = 3 bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) invert = the control is inverted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) Other macros include:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define SOC_DOUBLE(xname, reg, shift_left, shift_right, mask, invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) A stereo control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define SOC_DOUBLE_R(xname, reg_left, reg_right, shift, mask, invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) A stereo control spanning 2 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) Defines an single enumerated control as follows:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) xreg = register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) xshift = control bit(s) offset in register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) xmask = control bit(s) size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) xtexts = pointer to array of strings that describe each setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) Defines a stereo enumerated control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Codec Audio Operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) The codec driver also supports the following ALSA PCM operations:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* SoC audio ops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct snd_soc_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int (*startup)(struct snd_pcm_substream *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) void (*shutdown)(struct snd_pcm_substream *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int (*hw_free)(struct snd_pcm_substream *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) int (*prepare)(struct snd_pcm_substream *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) Please refer to the ALSA driver PCM documentation for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) http://www.alsa-project.org/~iwai/writing-an-alsa-driver/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) DAPM description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) The Dynamic Audio Power Management description describes the codec power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) components and their relationships and registers to the ASoC core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) Please read dapm.rst for details of building the description.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) Please also see the examples in other codec drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) DAPM event handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) This function is a callback that handles codec domain PM calls and system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) domain PM calls (e.g. suspend and resume). It is used to put the codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) to sleep when not in use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) Power states:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) SNDRV_CTL_POWER_D0: /* full On */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* vref/mid, clk and osc on, active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) SNDRV_CTL_POWER_D1: /* partial On */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) SNDRV_CTL_POWER_D2: /* partial On */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) SNDRV_CTL_POWER_D3hot: /* Off, with power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* everything off except vref/vmid, inactive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) SNDRV_CTL_POWER_D3cold: /* Everything Off, without power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) Codec DAC digital mute control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) Most codecs have a digital mute before the DACs that can be used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) minimise any system noise. The mute stops any digital data from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) entering the DAC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) A callback can be created that is called by the core for each codec DAI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) when the mute is applied or freed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) i.e.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int wm8974_mute(struct snd_soc_dai *dai, int mute)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct snd_soc_component *component = dai->component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u16 mute_reg = snd_soc_component_read32(component, WM8974_DAC) & 0xffbf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (mute)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) snd_soc_component_write(component, WM8974_DAC, mute_reg | 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) snd_soc_component_write(component, WM8974_DAC, mute_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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