Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) =================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) Notes on Maya44 USB Audio Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) =================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)    The following is the original document of Rainer's patch that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)    current maya44 code based on.  Some contents might be obsoleted, but I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)    keep here as reference -- tiwai
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) Feb 14, 2008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) Rainer Zimmermann <mail@lightshed.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) STATE OF DEVELOPMENT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) ====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) This driver is being developed on the initiative of Piotr Makowski (oponek@gmail.com) and financed by Lars Bergmann.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) Development is carried out by Rainer Zimmermann (mail@lightshed.de).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) ESI provided a sample Maya44 card for the development work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) However, unfortunately it has turned out difficult to get detailed programming information, so I (Rainer Zimmermann) had to find out some card-specific information by experiment and conjecture. Some information (in particular, several GPIO bits) is still missing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) This is the first testing version of the Maya44 driver released to the alsa-devel mailing list (Feb 5, 2008).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) The following functions work, as tested by Rainer Zimmermann and Piotr Makowski:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) - playback and capture at all sampling rates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) - input/output level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) - crossmixing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) - line/mic switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) - phantom power switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) - analogue monitor a.k.a bypass
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) The following functions *should* work, but are not fully tested:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) - Channel 3+4 analogue - S/PDIF input switching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) - S/PDIF output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) - all inputs/outputs on the M/IO/DIO extension card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) - internal/external clock selection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) *In particular, we would appreciate testing of these functions by anyone who has access to an M/IO/DIO extension card.*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) Things that do not seem to work:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) - The level meters ("multi track") in 'alsamixer' do not seem to react to signals in (if this is a bug, it would probably be in the existing ICE1724 code).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) - Ardour 2.1 seems to work only via JACK, not using ALSA directly or via OSS. This still needs to be tracked down.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) DRIVER DETAILS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) the following files were added:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) * pci/ice1724/maya44.c - Maya44 specific code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) * pci/ice1724/maya44.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) * pci/ice1724/ice1724.patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) * pci/ice1724/ice1724.h.patch - PROPOSED patch to ice1724.h (see SAMPLING RATES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) * i2c/other/wm8776.c - low-level access routines for Wolfson WM8776 codecs 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) * include/wm8776.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) Note that the wm8776.c code is meant to be card-independent and does not actually register the codec with the ALSA infrastructure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) This is done in maya44.c, mainly because some of the WM8776 controls are used in Maya44-specific ways, and should be named appropriately.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) the following files were created in pci/ice1724, simply #including the corresponding file from the alsa-kernel tree:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) * wtm.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) * vt1720_mobo.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) * revo.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) * prodigy192.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) * pontis.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) * phase.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) * maya44.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) * juli.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) * aureon.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) * amp.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) * envy24ht.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) * se.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) * prodigy_hifi.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) *I hope this is the correct way to do things.*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) SAMPLING RATES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) The Maya44 card (or more exactly, the Wolfson WM8776 codecs) allow a maximum sampling rate of 192 kHz for playback and 92 kHz for capture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) As the ICE1724 chip only allows one global sampling rate, this is handled as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) * setting the sampling rate on any open PCM device on the maya44 card will always set the *global* sampling rate for all playback and capture channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * In the current state of the driver, setting rates of up to 192 kHz is permitted even for capture devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *AVOID CAPTURING AT RATES ABOVE 96kHz*, even though it may appear to work. The codec cannot actually capture at such rates, meaning poor quality.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) I propose some additional code for limiting the sampling rate when setting on a capture pcm device. However because of the global sampling rate, this logic would be somewhat problematic.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) The proposed code (currently deactivated) is in ice1712.h.patch, ice1724.c and maya44.c (in pci/ice1712).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) SOUND DEVICES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) =============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PCM devices correspond to inputs/outputs as follows (assuming Maya44 is card #0):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * hw:0,0 input - stereo, analog input 1+2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * hw:0,0 output - stereo, analog output 1+2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * hw:0,1 input - stereo, analog input 3+4 OR S/PDIF input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * hw:0,1 output - stereo, analog output 3+4 (and SPDIF out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) NAMING OF MIXER CONTROLS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) (for more information about the signal flow, please refer to the block diagram on p.24 of the ESI Maya44 manual, or in the ESI windows software).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)     (digital) output level for channel 1+2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PCM 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)     same for channel 3+4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) Mic Phantom+48V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)     switch for +48V phantom power for electrostatic microphones on input 1/2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)     Make sure this is not turned on while any other source is connected to input 1/2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)     It might damage the source and/or the maya44 card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) Mic/Line input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)     if switch is on, input jack 1/2 is microphone input (mono), otherwise line input (stereo).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) Bypass
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)     analogue bypass from ADC input to output for channel 1+2. Same as "Monitor" in the windows driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) Bypass 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)     same for channel 3+4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) Crossmix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)     cross-mixer from channels 1+2 to channels 3+4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) Crossmix 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)     cross-mixer from channels 3+4 to channels 1+2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) IEC958 Output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)     switch for S/PDIF output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)     This is not supported by the ESI windows driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)     S/PDIF should output the same signal as channel 3+4. [untested!]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) Digitial output selectors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)     These switches allow a direct digital routing from the ADCs to the DACs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)     Each switch determines where the digital input data to one of the DACs comes from.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)     They are not supported by the ESI windows driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)     For normal operation, they should all be set to "PCM out".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) H/W
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)     Output source channel 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) H/W 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)     Output source channel 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) H/W 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)     Output source channel 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) H/W 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)     Output source channel 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) H/W 4 ... H/W 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)     unknown function, left in to enable testing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)     Possibly some of these control S/PDIF output(s).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)     If these turn out to be unused, they will go away in later driver versions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) Selectable values for each of the digital output selectors are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PCM out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	DAC output of the corresponding channel (default setting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) Input 1 ... Input 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	direct routing from ADC output of the selected input channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)