Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) ================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) Register Usage for Linux/PA-RISC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) ================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) [ an asterisk is used for planned usage which is currently unimplemented ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) General Registers as specified by ABI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) =====================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) Control Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) CR 0 (Recovery Counter)		used for ptrace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) CR 1-CR 7(undefined)		unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) CR 8 (Protection ID)		per-process value*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) CR 9, 12, 13 (PIDS)		unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) CR10 (CCR)			lazy FPU saving*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) CR11				as specified by ABI (SAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) CR14 (interruption vector)	initialized to fault_vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) CR15 (EIEM)			initialized to all ones*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) CR16 (Interval Timer)		read for cycle count/write starts Interval Tmr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) CR17-CR22			interruption parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) CR19				Interrupt Instruction Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) CR20				Interrupt Space Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) CR21				Interrupt Offset Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) CR22				Interrupt PSW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) CR23 (EIRR)			read for pending interrupts/write clears bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) CR24 (TR 0)			Kernel Space Page Directory Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) CR25 (TR 1)			User   Space Page Directory Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) CR26 (TR 2)			not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) CR27 (TR 3)			Thread descriptor pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) CR28 (TR 4)			not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) CR29 (TR 5)			not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) CR30 (TR 6)			current / 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) CR31 (TR 7)			Temporary register, used in various places
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) Space Registers (kernel mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) -----------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) SR0				temporary space register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) SR4-SR7 			set to 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) SR1				temporary space register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) SR2				kernel should not clobber this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) SR3				used for userspace accesses (current process)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) Space Registers (user mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) ---------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) SR0				temporary space register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) SR1                             temporary space register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) SR2                             holds space of linux gateway page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) SR3                             holds user address space value while in kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) SR4-SR7                         Defines short address space for user/kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) Processor Status Word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) ---------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) W (64-bit addresses)		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) E (Little-endian)		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) S (Secure Interval Timer)	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) T (Taken Branch Trap)		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) H (Higher-privilege trap)	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) L (Lower-privilege trap)	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) N (Nullify next instruction)	used by C code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) X (Data memory break disable)	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) B (Taken Branch)		used by C code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) C (code address translation)	1, 0 while executing real-mode code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) V (divide step correction)	used by C code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) M (HPMC mask)			0, 1 while executing HPMC handler*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) C/B (carry/borrow bits)		used by C code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) O (ordered references)		1*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) F (performance monitor)		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) R (Recovery Counter trap)	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) Q (collect interruption state)	1 (0 in code directly preceding an rfi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) P (Protection Identifiers)	1*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) D (Data address translation)	1, 0 while executing real-mode code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) I (external interrupt mask)	used by cli()/sti() macros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) "Invisible" Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) ---------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) PSW default W value		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) PSW default E value		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) Shadow Registers		used by interruption handler code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) TOC enable bit			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) ===============================	===============================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) -------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) The PA-RISC architecture defines 7 registers as "shadow registers".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) the state save and restore time by eliminating the need for general register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) (GR) saves and restores in interruption handlers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) -------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) Register usage notes, originally from John Marvin, with some additional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) notes from Randolph Chung.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) For the general registers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) r1,r2,r19-r26,r28,r29 & r31 can be used without saving them first. And of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) course, you need to save them if you care about them, before calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) another procedure. Some of the above registers do have special meanings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) that you should be aware of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)     r1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	The addil instruction is hardwired to place its result in r1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	so if you use that instruction be aware of that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)     r2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	This is the return pointer. In general you don't want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	use this, since you need the pointer to get back to your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	caller. However, it is grouped with this set of registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	since the caller can't rely on the value being the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	when you return, i.e. you can copy r2 to another register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	and return through that register after trashing r2, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	that should not cause a problem for the calling routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)     r19-r22:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	these are generally regarded as temporary registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	Note that in 64 bit they are arg7-arg4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)     r23-r26:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	these are arg3-arg0, i.e. you can use them if you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	don't care about the values that were passed in anymore.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)     r28,r29:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	are ret0 and ret1. They are what you pass return values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	in. r28 is the primary return. When returning small structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	r29 may also be used to pass data back to the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)     r30:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	stack pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)     r31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	the ble instruction puts the return pointer in here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)     r3-r18,r27,r30 need to be saved and restored. r3-r18 are just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)     general purpose registers. r27 is the data pointer, and is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)     used to make references to global variables easier. r30 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)     the stack pointer.