^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) OpenRISC Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) This is a port of Linux to the OpenRISC class of microprocessors; the initial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) For information about OpenRISC processors and ongoing development:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) ======= =============================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) website https://openrisc.io
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) email openrisc@lists.librecores.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) ======= =============================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ---------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Build instructions for OpenRISC toolchain and Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) ===================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) In order to build and run Linux for OpenRISC, you'll need at least a basic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) toolchain and, perhaps, the architectural simulator. Steps to get these bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) in place are outlined here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 1) Toolchain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Toolchain binaries can be obtained from openrisc.io or our github releases page.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Instructions for building the different toolchains can be found on openrisc.io
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) or Stafford's toolchain build and release scripts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ========== =================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) binaries https://github.com/openrisc/or1k-gcc/releases
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) toolchains https://openrisc.io/software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) building https://github.com/stffrdhrn/or1k-toolchain-build
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ========== =================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 2) Building
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) Build the Linux kernel as usual::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) make ARCH=openrisc CROSS_COMPILE="or1k-linux-"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 3) Running on FPGA (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) The OpenRISC community typically uses FuseSoC to manage building and programming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) an SoC into an FPGA. The below is an example of programming a De0 Nano
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) development board with the OpenRISC SoC. During the build FPGA RTL is code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) downloaded from the FuseSoC IP cores repository and built using the FPGA vendor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) tools. Binaries are loaded onto the board with openocd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) git clone https://github.com/olofk/fusesoc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) cd fusesoc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) sudo pip install -e .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) fusesoc init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) fusesoc build de0_nano
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) fusesoc pgm de0_nano
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) openocd -f interface/altera-usb-blaster.cfg \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) -f board/or1k_generic.cfg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) telnet localhost 4444
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) > init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) > halt; load_image vmlinux ; reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 4) Running on a Simulator (optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) QEMU is a processor emulator which we recommend for simulating the OpenRISC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) platform. Please follow the OpenRISC instructions on the QEMU website to get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) Linux running on QEMU. You can build QEMU yourself, but your Linux distribution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) likely provides binary packages to support OpenRISC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ============= ======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) qemu openrisc https://wiki.qemu.org/Documentation/Platforms/OpenRISC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ============= ======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ---------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) Terminology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ===========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) In the code, the following particles are used on symbols to limit the scope
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) to more or less specific processor implementations:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ========= =======================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) openrisc: the OpenRISC class of processors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) or1k: the OpenRISC 1000 family of processors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) or1200: the OpenRISC 1200 processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ========= =======================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ---------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) History
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 18-11-2003 Matjaz Breskvar (phoenix@bsemi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) initial port of linux to OpenRISC/or32 architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) all the core stuff is implemented and seams usable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 08-12-2003 Matjaz Breskvar (phoenix@bsemi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) complete change of TLB miss handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) rewrite of exceptions handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) fully functional sash-3.6 in default initrd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) a much improved version with changes all around.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 10-04-2004 Matjaz Breskvar (phoenix@bsemi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) alot of bugfixes all over.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ethernet support, functional http and telnet servers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) running many standard linux apps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 26-06-2004 Matjaz Breskvar (phoenix@bsemi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) port to 2.6.x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 30-11-2004 Matjaz Breskvar (phoenix@bsemi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) lots of bugfixes and enhancments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) added opencores framebuffer driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 09-10-2010 Jonas Bonn (jonas@southpole.se)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) major rewrite to bring up to par with upstream Linux 2.6.36
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags