Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) .. SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) .. include:: <isonum.txt>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) ===============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) C2 port support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) ===============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) (C) Copyright 2007 Rodolfo Giometti <giometti@enneenne.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) the Free Software Foundation; either version 2 of the License, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Overview
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) --------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) This driver implements the support for Linux of Silicon Labs (Silabs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) C2 Interface used for in-system programming of micro controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) By using this driver you can reprogram the in-system flash without EC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) or EC3 debug adapter. This solution is also useful in those systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) where the micro controller is connected via special GPIOs pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) References
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) The C2 Interface main references are at (https://www.silabs.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Silicon Laboratories site], see:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - AN127: FLASH Programming via the C2 Interface at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   https://www.silabs.com/Support Documents/TechnicalDocs/an127.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - C2 Specification at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)   https://www.silabs.com/pages/DownloadDoc.aspx?FILEURL=Support%20Documents/TechnicalDocs/an127.pdf&src=SearchResults
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) however it implements a two wire serial communication protocol (bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) banging) designed to enable in-system programming, debugging, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) boundary-scan testing on low pin-count Silicon Labs devices. Currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) this code supports only flash programming but extensions are easy to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) add.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) Using the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) Once the driver is loaded you can use sysfs support to get C2port's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) info or read/write in-system flash::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)   # ls /sys/class/c2port/c2port0/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)   access            flash_block_size  flash_erase       rev_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)   dev_id            flash_blocks_num  flash_size        subsystem/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)   flash_access      flash_data        reset             uevent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) Initially the C2port access is disabled since you hardware may have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) such lines multiplexed with other devices so, to get access to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) C2port, you need the command::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)   # echo 1 > /sys/class/c2port/c2port0/access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) after that you should read the device ID and revision ID of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) connected micro controller::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)   # cat /sys/class/c2port/c2port0/dev_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)   8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)   # cat /sys/class/c2port/c2port0/rev_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)   1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) However, for security reasons, the in-system flash access in not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) enabled yet, to do so you need the command::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)   # echo 1 > /sys/class/c2port/c2port0/flash_access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) After that you can read the whole flash::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)   # cat /sys/class/c2port/c2port0/flash_data > image
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) erase it::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)   # echo 1 > /sys/class/c2port/c2port0/flash_erase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) and write it::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)   # cat image > /sys/class/c2port/c2port0/flash_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) after writing you have to reset the device to execute the new code::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)   # echo 1 > /sys/class/c2port/c2port0/reset