^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ==========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Kernel driver i2c-mux-gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ==========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Author: Peter Korsgaard <peter.korsgaard@barco.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) i2c-mux-gpio is an i2c mux driver providing access to I2C bus segments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) from a master I2C bus and a hardware MUX controlled through GPIO pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) E.G.::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ---------- ---------- Bus segment 1 - - - - -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) | | SCL/SDA | |-------------- | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) | |------------| |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) | | | | Bus segment 2 | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) | Linux | GPIO 1..N | MUX |--------------- Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) | |------------| | | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) | | | | Bus segment M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) | | | |---------------| |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) ---------- ---------- - - - - -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) according to the settings of the GPIO pins 1..N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Usage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) -----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) i2c-mux-gpio uses the platform bus, so you need to provide a struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) platform_device with the platform_data pointing to a struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) i2c_mux_gpio_platform_data with the I2C adapter number of the master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) bus, the number of bus segments to create and the GPIO pins used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) to control it. See include/linux/platform_data/i2c-mux-gpio.h for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) E.G. something like this for a MUX providing 4 bus segments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) controlled through 3 GPIO pins::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/platform_data/i2c-mux-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static const unsigned myboard_gpiomux_gpios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) AT91_PIN_PC26, AT91_PIN_PC25, AT91_PIN_PC24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static const unsigned myboard_gpiomux_values[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 0, 1, 2, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct i2c_mux_gpio_platform_data myboard_i2cmux_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .parent = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .base_nr = 2, /* optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .values = myboard_gpiomux_values,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .n_values = ARRAY_SIZE(myboard_gpiomux_values),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .gpios = myboard_gpiomux_gpios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .n_gpios = ARRAY_SIZE(myboard_gpiomux_gpios),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .idle = 4, /* optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static struct platform_device myboard_i2cmux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .name = "i2c-mux-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .platform_data = &myboard_i2cmux_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) If you don't know the absolute GPIO pin numbers at registration time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) you can instead provide a chip name (.chip_name) and relative GPIO pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) numbers, and the i2c-mux-gpio driver will do the work for you,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) including deferred probing if the GPIO chip isn't immediately
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Device Registration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) -------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) When registering your i2c-mux-gpio device, you should pass the number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) of any GPIO pin it uses as the device ID. This guarantees that every
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) instance has a different ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) Alternatively, if you don't need a stable device name, you can simply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) pass PLATFORM_DEVID_AUTO as the device ID, and the platform core will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) assign a dynamic ID to your device. If you do not know the absolute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) GPIO pin numbers at registration time, this is even the only option.