^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) =======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Kernel driver i2c-piix4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Supported adapters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Intel 82371AB PIIX4 and PIIX4E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Intel 82443MX (440MX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Datasheet: Publicly available at the Intel website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * ServerWorks OSB4, CSB5, CSB6, HT-1000 and HT-1100 southbridges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Datasheet: Only available via NDA from ServerWorks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Datasheet: Not publicly available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) SB700 register reference available at:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) http://support.amd.com/us/Embedded_TechDocs/43009_sb7xx_rrg_pub_1.00.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * AMD SP5100 (SB700 derivative found on some server mainboards)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Datasheet: Publicly available at the AMD website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) http://support.amd.com/us/Embedded_TechDocs/44413.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * AMD Hudson-2, ML, CZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Datasheet: Not publicly available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Hygon CZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Datasheet: Not publicly available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Datasheet: Publicly available at the SMSC website http://www.smsc.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - Frodo Looijaard <frodol@dds.nl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - Philip Edelbrock <phil@netroedge.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Module Parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * force: int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Forcibly enable the PIIX4. DANGEROUS!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * force_addr: int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) functionality. Among other things, it implements the PCI bus. One of its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) minor functions is implementing a System Management Bus. This is a true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SMBus - you can not access it on I2C levels. The good news is that it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) natively understands SMBus commands and you do not have to worry about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) timing problems. The bad news is that non-SMBus devices connected to it can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) confuse it mightily. Yes, this is known to happen...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) Do ``lspci -v`` and see whether it contains an entry like this::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 0000:00:02.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) Flags: medium devsel, IRQ 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Bus and device numbers may differ, but the function number must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) identical (like many PCI devices, the PIIX4 incorporates a number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) different 'functions', which can be considered as separate devices). If you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) find such an entry, you have a PIIX4 SMBus controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) On some computers (most notably, some Dells), the SMBus is disabled by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) default. If you use the insmod parameter 'force=1', the kernel module will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not set up a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) correct address for this module, you could get in big trouble (read:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) crashes, data corruption, etc.). Try this only as a last resort (try BIOS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) updates first, for example), and backup first! An even more dangerous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 'force' foes, but it will also set a new base I/O port address. The SMBus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) parts of the PIIX4 needs a range of 8 of these addresses to function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) correctly. If these addresses are already reserved by some other device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ABOUT WHAT YOU ARE DOING!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) The PIIX4E is just an new version of the PIIX4; it is supported as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) this driver on those mainboards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) identical to the PIIX4 in I2C/SMBus support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) The AMD SB700, SB800, SP5100 and Hudson-2 chipsets implement two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PIIX4-compatible SMBus controllers. If your BIOS initializes the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) secondary controller, it will be detected by this driver as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) an "Auxiliary SMBus Host Controller".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) If you own Force CPCI735 motherboard or other OSB4 based systems you may need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) to change the SMBus Interrupt Select register so the SMBus controller uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) the SMI mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 1) Use lspci command and locate the PCI device with the SMBus controller:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) The line may vary for different chipsets. Please consult the driver source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) for all possible PCI ids (and lspci -n to match them). Lets assume the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) device is located at 00:0f.0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 2) Now you just need to change the value in 0xD2 register. Get it first with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) command: lspci -xxx -s 00:0f.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) If the value is 0x3 then you need to change it to 0x1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) setpci -s 00:0f.0 d2.b=1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) Please note that you don't need to do that in all cases, just when the SMBus is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) not working properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) Hardware-specific issues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) This driver will refuse to load on IBM systems with an Intel PIIX4 SMBus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) Some of these machines have an RFID EEPROM (24RF08) connected to the SMBus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) which can easily get corrupted due to a state machine bug. These are mostly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) Thinkpad laptops, but desktop systems may also be affected. We have no list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) of all affected systems, so the only safe solution was to prevent access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) the SMBus on all IBM systems (detected using DMI data.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) For additional information, read:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) http://www.lm-sensors.org/browser/lm-sensors/trunk/README
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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