^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Kernel driver i2c-i801
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Supported adapters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) '810' and '810E' chipsets)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Intel 82801BA (ICH2 - part of the '815E' chipset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Intel 82801CA/CAM (ICH3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Intel 82801DB (ICH4) (HW PEC supported)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Intel 82801EB/ER (ICH5) (HW PEC supported)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Intel 6300ESB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Intel 82801FB/FR/FW/FRW (ICH6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Intel 82801G (ICH7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Intel 631xESB/632xESB (ESB2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Intel 82801H (ICH8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Intel 82801I (ICH9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Intel EP80579 (Tolapai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Intel 82801JI (ICH10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Intel 5/3400 Series (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Intel 6 Series (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Intel Patsburg (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Intel DH89xxCC (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Intel Panther Point (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Intel Lynx Point (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Intel Avoton (SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * Intel Wellsburg (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * Intel Coleto Creek (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Intel Wildcat Point (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Intel BayTrail (SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Intel Braswell (SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * Intel Sunrise Point (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Intel Kaby Lake (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Intel DNV (SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Intel Broxton (SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Intel Lewisburg (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Intel Gemini Lake (SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Intel Cannon Lake (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Intel Cedar Fork (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Intel Ice Lake (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Intel Comet Lake (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Intel Elkhart Lake (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Intel Tiger Lake (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Intel Jasper Lake (SOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * Intel Emmitsburg (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Intel Alder Lake (PCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Datasheets: Publicly available at the Intel website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) On Intel Patsburg and later chipsets, both the normal host SMBus controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) and the additional 'Integrated Device Function' controllers are supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - Mark Studebaker <mdsxyz123@yahoo.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - Jean Delvare <jdelvare@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Module Parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * disable_features (bit vector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) Disable selected features normally supported by the device. This makes it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) possible to work around possible driver or hardware bugs if the feature in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) question doesn't work as intended for whatever reason. Bit values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ==== =========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 0x01 disable SMBus PEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 0x02 disable the block buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 0x08 disable the I2C block read functionality
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 0x10 don't use interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0x20 disable SMBus Host Notify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ==== =========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ICH3 (82801CA/CAM) and later devices (PCH) are Intel chips that are a part of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) Intel's '810' chipset for Celeron-based PCs, '810E' chipset for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) Pentium-based PCs, '815E' chipset, and others.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) The ICH chips contain at least SEVEN separate PCI functions in TWO logical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PCI devices. An output of lspci will show something similar to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) following::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) The ICH chips are quite similar to Intel's PIIX4 chip, at least in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) SMBus controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) Process Call Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) --------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) Block process call is supported on the 82801EB (ICH5) and later chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) I2C Block Read Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) I2C block read is supported on the 82801EB (ICH5) and later chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) SMBus 2.0 Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Interrupt Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PCI interrupt support is supported on the 82801EB (ICH5) and later chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) Hidden ICH SMBus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) ----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) If your system has an Intel ICH south bridge, but you do NOT see the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) BIOS to enable it, it means it has been hidden by the BIOS code. Asus is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) well known for first doing this on their P4B motherboard, and many other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) boards after that. Some vendor machines are affected as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) The first thing to try is the "i2c-scmi" ACPI driver. It could be that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) SMBus was hidden on purpose because it'll be driven by ACPI. If the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) i2c-scmi driver works for you, just forget about the i2c-i801 driver and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) don't try to unhide the ICH SMBus. Even if i2c-scmi doesn't work, you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) better make sure that the SMBus isn't used by the ACPI code. Try loading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) the "fan" and "thermal" drivers, and check in /sys/class/thermal. If you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) find a thermal zone with type "acpitz", it's likely that the ACPI is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) accessing the SMBus and it's safer not to unhide it. Only once you are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) certain that ACPI isn't using the SMBus, you can attempt to unhide it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) In order to unhide the SMBus, we need to change the value of a PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) register before the kernel enumerates the PCI devices. This is done in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) drivers/pci/quirks.c, where all affected boards must be listed (see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) function asus_hides_smbus_hostbridge.) If the SMBus device is missing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) and you think there's something interesting on the SMBus (e.g. a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) hardware monitoring chip), you need to add your board to the list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) The motherboard is identified using the subvendor and subdevice IDs of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) host bridge PCI device. Get yours with ``lspci -n -v -s 00:00.0``::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 00:00.0 Class 0600: 8086:2570 (rev 02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) Subsystem: 1043:80f2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) Flags: bus master, fast devsel, latency 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) Memory at fc000000 (32-bit, prefetchable) [size=32M]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) Capabilities: [e4] #09 [2106]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) Capabilities: [a0] AGP version 3.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) (Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) names for the bridge ID and the subvendor ID in include/linux/pci_ids.h,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) and then add a case for your subdevice ID at the right place in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) drivers/pci/quirks.c. Then please give it very good testing, to make sure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) that the unhidden SMBus doesn't conflict with e.g. ACPI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) If it works, proves useful (i.e. there are usable chips on the SMBus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) and seems safe, please submit a patch for inclusion into the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) Note: There's a useful script in lm_sensors 2.10.2 and later, named
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) temporarily unhide the SMBus without having to patch and recompile your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) kernel. It's very convenient if you just want to check if there's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) anything interesting on your hidden ICH SMBus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ----------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) The lm_sensors project gratefully acknowledges the support of Texas
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) Instruments in the initial development of this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) The lm_sensors project gratefully acknowledges the support of Intel in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) development of SMBus 2.0 / ICH4 features of this driver.