^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Kernel driver sis5595
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) =====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Silicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Prefix: 'sis5595'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Addresses scanned: ISA in PCI-space encoded address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Datasheet: Publicly available at the Silicon Integrated Systems Corp. site.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - Kyösti Mälkki <kmalkki@cc.hut.fi>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - Mark D. Studebaker <mdsxyz123@yahoo.com>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - Aurelien Jarno <aurelien@aurel32.net> 2.6 port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) SiS southbridge has a LM78-like chip integrated on the same IC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) This driver is a customized copy of lm78.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Supports following revisions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) =============== =============== ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Version PCI ID PCI Revision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) =============== =============== ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 1 1039/0008 AF or less
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 2 1039/0008 B0 or greater
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) =============== =============== ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Note: these chips contain a 0008 device which is incompatible with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 5595. We recognize these by the presence of the listed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "blacklist" PCI ID and refuse to load.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) =================== =============== ================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) NOT SUPPORTED PCI ID BLACKLIST PCI ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) =================== =============== ================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 540 0008 0540
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 550 0008 0550
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 5513 0008 5511
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 5581 0008 5597
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 5582 0008 5597
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 5597 0008 5597
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 630 0008 0630
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 645 0008 0645
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 730 0008 0730
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 735 0008 0735
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) =================== =============== ================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Module Parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ======================= =====================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) force_addr=0xaddr Set the I/O base address. Useful for boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) that don't set the address in the BIOS. Does not do a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PCI force; the device must still be present in lspci.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) Don't use this unless the driver complains that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) base address is not set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) Example: 'modprobe sis5595 force_addr=0x290'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ======================= =====================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) The SiS5595 southbridge has integrated hardware monitor functions. It also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) has an I2C bus, but this driver only supports the hardware monitor. For the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) I2C bus driver see i2c-sis5595.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) The SiS5595 implements zero or one temperature sensor, two fan speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) sensors, four or five voltage sensors, and alarms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) On the first version of the chip, there are four voltage sensors and one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) temperature sensor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) On the second version of the chip, the temperature sensor (temp) and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) fifth voltage sensor (in4) share a pin which is configurable, but not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) through the driver. Sorry. The driver senses the configuration of the pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) which was hopefully set by the BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) Temperatures are measured in degrees Celsius. An alarm is triggered once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) when the max is crossed; it is also triggered when it drops below the min
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) value. Measurements are guaranteed between -55 and +125 degrees, with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) resolution of 1 degree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) Fan rotation speeds are reported in RPM (rotations per minute). An alarm is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) triggered if the rotation speed has dropped below a programmable limit. Fan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) readings can be divided by a programmable divider (1, 2, 4 or 8) to give
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) the readings more range or accuracy. Not all RPM values can accurately be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) represented, so some rounding is done. With a divider of 2, the lowest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) representable value is around 2600 RPM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) Voltage sensors (also known as IN sensors) report their values in volts. An
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) alarm is triggered if the voltage has crossed a programmable minimum or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) maximum limit. Note that minimum in this case always means 'closest to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) zero'; this is important for negative voltage measurements. All voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) inputs can measure voltages between 0 and 4.08 volts, with a resolution of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 0.016 volt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) In addition to the alarms described above, there is a BTI alarm, which gets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) triggered when an external chip has crossed its limits. Usually, this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) connected to some LM75-like chip; if at least one crosses its limits, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) bit gets set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) If an alarm triggers, it will remain triggered until the hardware register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) is read at least once. This means that the cause for the alarm may already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) have disappeared! Note that in the current implementation, all hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) registers are read whenever any data is read (unless it is less than 1.5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) seconds since the last update). This means that you can easily miss
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) once-only alarms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) The SiS5595 only updates its values each 1.5 seconds; reading it more often
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) will do no harm, but will return 'old' values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Problems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) --------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) Some chips refuse to be enabled. We don't know why.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) The driver will recognize this and print a message in dmesg.
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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