Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Kernel driver powr1220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)   * Lattice POWR1220AT8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)     Prefix: 'powr1220'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)     Addresses scanned: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)     Datasheet: Publicly available at the Lattice website
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	       http://www.latticesemi.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Author: Scott Kanowitz <scott.kanowitz@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) This driver supports the Lattice POWR1220AT8 chip. The POWR1220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) includes voltage monitoring for 14 inputs as well as trim settings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) for output voltages and GPIOs. This driver implements the voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) monitoring portion of the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Voltages are sampled by a 12-bit ADC with a step size of 2 mV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) An in-line attenuator allows measurements from 0 to 6 V. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) attenuator is enabled or disabled depending on the setting of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) input's max value. The driver will enable the attenuator for any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) value over the low measurement range maximum of 2 V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) The input naming convention is as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ============== ========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) driver name    pin name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ============== ========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) in0            VMON1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) in1            VMON2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) in2            VMON3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) in2            VMON4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) in4            VMON5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) in5            VMON6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) in6            VMON7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) in7            VMON8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) in8            VMON9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) in9            VMON10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) in10           VMON11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) in11           VMON12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) in12           VCCA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) in13           VCCINP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ============== ========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) The ADC readings are updated on request with a minimum period of 1s.